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S_PCIe_02 coverage issue - memory address accesses to downstream functions #347

@sunnywang-arm

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@sunnywang-arm

According to the S_PCIe_02 rule language below in SBSA spec, the rule is not limited to Root Port local BAR accesses, but also explicitly applies to accesses to downstream functions.

- S_PCIe_02 The Root Port must support the following:
    - 1B and 2B read from 64-bit memory and 32-bit memory address spaces.
    - 1B and 2B write to 64-bit memory and 32-bit memory address spaces.
- This must hold true for accesses to downstream functions as well as to the Root Port itself. This must hold true even when the read or write address is not DW (4 Byte) aligned

The current ACS coverage associated with this rule is centered on Root Port memory access and Root Port byte-enable behavior, and does not clearly demonstrate full coverage of the downstream-function aspect of the rule.

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