diff --git a/.gitignore b/.gitignore index dc00d664..94eef259 100644 --- a/.gitignore +++ b/.gitignore @@ -26,6 +26,9 @@ # Visual Studio cache directory .vs/ +# Visual Studio Code directory +.vscode/ + # Gradle cache directory .gradle/ @@ -71,3 +74,6 @@ crashlytics-build.properties /[Aa]ssets/[Ss]treamingAssets/aa/* /.idea /.vsconfig + +# Why not gitignore the f****** projectversion +ProjectSettings/ProjectVersion.txt diff --git a/Assets/Build/DLS.unity b/Assets/Build/DLS.unity index 209cbc4f..677f1b78 100644 --- a/Assets/Build/DLS.unity +++ b/Assets/Build/DLS.unity @@ -244,7 +244,7 @@ MonoBehaviour: openInMainMenu: 0 testProjectName: MainTest openA: 1 - chipToOpenA: BuzzTest + chipToOpenA: SPSTest chipToOpenB: TEST MergeSplit testVecA: {x: 100, y: 0.5333334} testVecB: {x: 1.71, y: 0.0025} diff --git a/Assets/Scripts/Description/Helpers/ChipTypeHelper.cs b/Assets/Scripts/Description/Helpers/ChipTypeHelper.cs index 3d1e60d0..2c5ae88e 100644 --- a/Assets/Scripts/Description/Helpers/ChipTypeHelper.cs +++ b/Assets/Scripts/Description/Helpers/ChipTypeHelper.cs @@ -33,6 +33,8 @@ public static class ChipTypeHelper { ChipType.Buzzer, "BUZZER" }, + { ChipType.SPS, "SPS" }, + // ---- Not really chips (but convenient to treat them as such anyway) ---- // ---- Inputs/Outputs ---- diff --git a/Assets/Scripts/Description/Types/SubTypes/ChipTypes.cs b/Assets/Scripts/Description/Types/SubTypes/ChipTypes.cs index 610f0298..5ca6b5cf 100644 --- a/Assets/Scripts/Description/Types/SubTypes/ChipTypes.cs +++ b/Assets/Scripts/Description/Types/SubTypes/ChipTypes.cs @@ -47,7 +47,9 @@ public enum ChipType BusTerminus_8Bit, // ---- Audio ---- - Buzzer + Buzzer, + // ---- Clock ---- + SPS, } } \ No newline at end of file diff --git a/Assets/Scripts/Game/Project/BuiltinChipCreator.cs b/Assets/Scripts/Game/Project/BuiltinChipCreator.cs index c757f1e1..7f7f1928 100644 --- a/Assets/Scripts/Game/Project/BuiltinChipCreator.cs +++ b/Assets/Scripts/Game/Project/BuiltinChipCreator.cs @@ -51,7 +51,9 @@ public static ChipDescription[] CreateAllBuiltinChipDescriptions() CreateBus(PinBitCount.Bit8), CreateBusTerminus(PinBitCount.Bit8), // ---- Audio ---- - CreateBuzzer() + CreateBuzzer(), + // ---- Clock ---- + CreateSPSChip(), }; } @@ -81,6 +83,25 @@ static ChipDescription CreateBuzzer() return CreateBuiltinChipDescription(ChipType.Buzzer, size, col, inputPins, null, null); } + static ChipDescription CreateSPSChip() + { + Color col = new(0.4f, 0.3f, 0.3f); + + PinDescription[] outputPins = + { + CreatePinDescription("SPCT_B", 5, PinBitCount.Bit8), + CreatePinDescription("SPCT_A", 4, PinBitCount.Bit8), + CreatePinDescription("SPS_B", 3, PinBitCount.Bit8), + CreatePinDescription("SPS_A", 2, PinBitCount.Bit8), + CreatePinDescription("SPS_OVERFLOW", 1, PinBitCount.Bit1), + CreatePinDescription("SPCT_OVERFLOW", 0, PinBitCount.Bit1), + }; + + float height = SubChipInstance.MinChipHeightForPins(outputPins, null); + Vector2 size = new(CalculateGridSnappedWidth(GridSize * 9), height); + + return CreateBuiltinChipDescription(ChipType.SPS, size, col, null, outputPins); + } static ChipDescription dev_CreateRAM_8() { diff --git a/Assets/Scripts/Simulation/Simulator.cs b/Assets/Scripts/Simulation/Simulator.cs index 1d777628..00adfe40 100644 --- a/Assets/Scripts/Simulation/Simulator.cs +++ b/Assets/Scripts/Simulation/Simulator.cs @@ -1,6 +1,7 @@ using System; using System.Collections.Concurrent; using System.Diagnostics; +using UnityEngine; using DLS.Description; using DLS.Game; using Random = System.Random; @@ -506,6 +507,21 @@ static void ProcessBuiltinChip(SimChip chip) audioState.RegisterNote(freqIndex, (uint)volumeIndex); break; } + case ChipType.SPS: + { + const int ByteMask = 0b11111111; + double tps = Project.ActiveProject.simAvgTicksPerSec; + ushort sps = (ushort)tps; + ushort spc = (ushort)stepsPerClockTransition; + + PinState.Set(ref chip.OutputPins[5].State, tps >= 65536 ? PinState.LogicHigh : PinState.LogicLow); + PinState.Set(ref chip.OutputPins[4].State, stepsPerClockTransition > 65535 ? PinState.LogicHigh : PinState.LogicLow); + chip.OutputPins[3].State = (ushort)(sps & ByteMask); + chip.OutputPins[2].State = (ushort)((sps >> 8) & ByteMask); + chip.OutputPins[1].State = (ushort)(spc & ByteMask); + chip.OutputPins[0].State = (ushort)((spc >> 8) & ByteMask); + break; + } // ---- Bus types ---- default: { diff --git a/TestData/Projects/MainTest/Chips/SPSTest.json b/TestData/Projects/MainTest/Chips/SPSTest.json new file mode 100644 index 00000000..3a098220 --- /dev/null +++ b/TestData/Projects/MainTest/Chips/SPSTest.json @@ -0,0 +1,185 @@ +{ + "DLSVersion": "2.1.6", + "Name": "SPSTest", + "NameLocation": 0, + "ChipType": 0, + "Size": { + "x": 1.175, + "y": 3.5 + }, + "Colour": { + "r": 0.376221627, + "g": 0.949174643, + "b": 0.4645198, + "a": 1 + }, + "InputPins":[], + "OutputPins":[ + { + "Name":"OUT", + "ID":908310544, + "Position":{ + "x":1.125, + "y":0.6875 + }, + "BitCount":8, + "Colour":0, + "ValueDisplayMode":1 + }, + { + "Name":"OUT", + "ID":86585601, + "Position":{ + "x":1.125, + "y":0.1875 + }, + "BitCount":8, + "Colour":0, + "ValueDisplayMode":1 + }, + { + "Name":"OUT", + "ID":1415148896, + "Position":{ + "x":1.125, + "y":-0.3125 + }, + "BitCount":8, + "Colour":0, + "ValueDisplayMode":1 + }, + { + "Name":"OUT", + "ID":405999015, + "Position":{ + "x":1.125, + "y":-0.8125 + }, + "BitCount":8, + "Colour":0, + "ValueDisplayMode":1 + }, + { + "Name":"OUT", + "ID":917260170, + "Position":{ + "x":1.125, + "y":-1.3125 + }, + "BitCount":1, + "Colour":0, + "ValueDisplayMode":0 + }, + { + "Name":"OUT", + "ID":2003410447, + "Position":{ + "x":1.125, + "y":-1.8125 + }, + "BitCount":1, + "Colour":0, + "ValueDisplayMode":0 + } + ], + "SubChips":[ + { + "Name":"SPS", + "ID":1380022051, + "Label":"", + "Position":{ + "x":-1.25, + "y":-0.3125 + }, + "OutputPinColourInfo":[{"PinColour":0,"PinID":5},{"PinColour":0,"PinID":4},{"PinColour":0,"PinID":3},{"PinColour":0,"PinID":2},{"PinColour":0,"PinID":1},{"PinColour":0,"PinID":0}], + "InternalData":null + } + ], + "Wires":[ + { + "SourcePinAddress":{ + "PinID":5, + "PinOwnerID":1380022051 + }, + "TargetPinAddress":{ + "PinID":0, + "PinOwnerID":908310544 + }, + "ConnectionType":0, + "ConnectedWireIndex":-1, + "ConnectedWireSegmentIndex":-1, + "Points":[{"x":0.0,"y":0.0},{"x":0.0,"y":0.0}] + }, + { + "SourcePinAddress":{ + "PinID":4, + "PinOwnerID":1380022051 + }, + "TargetPinAddress":{ + "PinID":0, + "PinOwnerID":86585601 + }, + "ConnectionType":0, + "ConnectedWireIndex":-1, + "ConnectedWireSegmentIndex":-1, + "Points":[{"x":0.0,"y":0.0},{"x":0.0,"y":0.0}] + }, + { + "SourcePinAddress":{ + "PinID":3, + "PinOwnerID":1380022051 + }, + "TargetPinAddress":{ + "PinID":0, + "PinOwnerID":1415148896 + }, + "ConnectionType":0, + "ConnectedWireIndex":-1, + "ConnectedWireSegmentIndex":-1, + "Points":[{"x":0.0,"y":0.0},{"x":0.0,"y":0.0}] + }, + { + "SourcePinAddress":{ + "PinID":2, + "PinOwnerID":1380022051 + }, + "TargetPinAddress":{ + "PinID":0, + "PinOwnerID":405999015 + }, + "ConnectionType":0, + "ConnectedWireIndex":-1, + "ConnectedWireSegmentIndex":-1, + "Points":[{"x":0.0,"y":0.0},{"x":0.0,"y":0.0}] + }, + { + "SourcePinAddress":{ + "PinID":1, + "PinOwnerID":1380022051 + }, + "TargetPinAddress":{ + "PinID":0, + "PinOwnerID":917260170 + }, + "ConnectionType":0, + "ConnectedWireIndex":-1, + "ConnectedWireSegmentIndex":-1, + "Points":[{"x":0.0,"y":0.0},{"x":0.0,"y":0.0}] + }, + { + "SourcePinAddress":{ + "PinID":0, + "PinOwnerID":1380022051 + }, + "TargetPinAddress":{ + "PinID":0, + "PinOwnerID":2003410447 + }, + "ConnectionType":0, + "ConnectedWireIndex":-1, + "ConnectedWireSegmentIndex":-1, + "Points":[{"x":0.0,"y":0.0},{"x":0.0,"y":0.0}] + } + ], + "Displays": null +} \ No newline at end of file diff --git a/TestData/Projects/MainTest/ProjectDescription.json b/TestData/Projects/MainTest/ProjectDescription.json index 6d1823ff..2074a724 100644 --- a/TestData/Projects/MainTest/ProjectDescription.json +++ b/TestData/Projects/MainTest/ProjectDescription.json @@ -1,9 +1,9 @@ { "ProjectName": "MainTest", - "DLSVersion_LastSaved": "2.1.5", + "DLSVersion_LastSaved": "2.1.6", "DLSVersion_EarliestCompatible": "2.0.0", - "CreationTime": "2025-03-14T18:23:30.404+01:00", - "LastSaveTime": "2025-05-04T09:15:41.061+02:00", + "CreationTime": "2025-03-15T00:23:30.404+07:00", + "LastSaveTime": "2025-05-31T16:34:51.885+07:00", "Prefs_MainPinNamesDisplayMode": 2, "Prefs_ChipPinNamesDisplayMode": 1, "Prefs_GridDisplayMode": 1, @@ -62,7 +62,8 @@ "RAM-sync", "TEST MergeSplit", "#", - "BuzzTest" + "BuzzTest", + "SPSTest" ], "StarredList":[ { @@ -96,27 +97,31 @@ { "Name":"BuzzTest", "IsCollection":false + }, + { + "Name":"SPSTest", + "IsCollection":false } ], "ChipCollections":[ { "Chips":["NAND","AND","NOT","NOR","XOR","OR","KEY","CLOCK","3-STATE BUFFER"], - "IsToggledOpen":false, + "IsToggledOpen":true, "Name":"BASICS" }, { "Chips":["IN-1","IN-4","IN-8","OUT-1","OUT-4","OUT-8"], - "IsToggledOpen":false, + "IsToggledOpen":true, "Name":"IN/OUT" }, { "Chips":["1-4BIT","1-8BIT","4-8BIT","8-4BIT","8-1BIT","4-1BIT"], - "IsToggledOpen":false, + "IsToggledOpen":true, "Name":"MERGE/SPLIT" }, { "Chips":["7-SEGMENT","DECIMAL-4","DECIMAL-8","DOT DISPLAY","RGB DISPLAY","LED"], - "IsToggledOpen":false, + "IsToggledOpen":true, "Name":"DISPLAY" }, { @@ -131,7 +136,7 @@ }, { "Chips":["D-LATCH","FLIP-FLOP","OR-8","MEM-1","NOT-8","AND(8,1)","MUX-8","PC","BUF-8","ALU-8","DECODE-3","AND-3","CONTROL UNIT","TOGGLE","FLAGS","DISP-7","demo","7-SEGMENT DRIVER","DABBLE","LSB","LSHIFT-8","DOUBLE DABBLE","ALU","BUS BUFFER","MEM-256","REGISTER-8","XNOR","EQUALS-8","ADDER-4","DECODER-2","ADDER-8","ADDER","MEM-16","REGISTER-1","AND-8","RAM-256×8 (async)","ROM 256×16"], - "IsToggledOpen":false, + "IsToggledOpen":true, "Name":"KEEP" }, { @@ -140,7 +145,7 @@ "Name":"TEST" }, { - "Chips":["PULSE","TEST MergeSplit"], + "Chips":["PULSE","TEST MergeSplit","BUZZER","SPS","#","BuzzTest","SPSTest"], "IsToggledOpen":true, "Name":"OTHER" }