CPU_Emulator.cpp

#include <cstdio>
#include <cstdint>
#include <cstddef>
#include <iostream>
#include <fstream>
#include <thread>
#include <chrono>

using namespace std;

const uint32_t MEM_SIZE = 65536;
uint8_t memory[MEM_SIZE];

// Status Register (P) 
union StatusRegister {
    uint8_t byte; // Access the entire register as a byte
    struct {
        uint8_t C : 1; // Bit 0: Carry Flag
        uint8_t Z : 1; // Bit 1: Zero Flag
        uint8_t I : 1; // Bit 2: Interrupt Disable
         uint8_t D : 1; // Bit 3: Decimal Mode
        uint8_t B : 1; // Bit 4: Break Command
        uint8_t unused : 1; // Bit 5: Always 1 on the stack
        uint8_t V : 1; // Bit 6: Overflow Flag
        uint8_t N : 1; // Bit 7: Negative Flag
    } bits;
};

// CPU State (Registers)
struct CPU {
    uint16_t PC; // Program Counter
    uint8_t SP;  // Stack Pointer
    uint8_t A, X, Y; // Accumulator, Index Registers
    StatusRegister P; // Status Register
};

CPU cpu;

//Store the bytes into memory from binary file
void load_program() {

    const char* fileName = "6502_functional_test.bin";

    ifstream file(fileName, ios::binary);   //open the file in binary mode

    if (!file) {
        cout << "file couldn't be opened. " << endl;
        return;
    }
    
    file.seekg(0, ios::end);  // Move to the end of the file
    streampos fileSize = file.tellg();  //get the file size
    cout << "File size: " << fileSize << endl;

    file.seekg(0, ios::beg);  // Move back to the beginning of the file

    //read data to memory
    file.read(reinterpret_cast<char*>(memory), MEM_SIZE);   
    cout << "Total " << file.gcount() << " valid data was read from the file.\n" << endl;

    file.close();    //closing the file
}

//Display Status Register for velidation checking
void check_result()
{
    //printing register
    cout << "PC: " << hex << cpu.PC << ", A: " << hex << (int)cpu.A << ", X: " << hex << (int)cpu.X;
    cout << ", Y: " << hex << (int)cpu.Y << ", SP: " << hex << (int)cpu.SP << endl;

    //printing processor status
    printf("P: N:%d V:%d B:%d D:%d I:%d Z:%d C:%d (Byte:$%.2X)\n",
        cpu.P.bits.N, cpu.P.bits.V, cpu.P.bits.B, cpu.P.bits.D,
        cpu.P.bits.I, cpu.P.bits.Z, cpu.P.bits.C, cpu.P.byte);
}

//Load register and update Z, N flags
void LoadRegister(uint8_t& updateReg, uint16_t address) {
    //Access & Store the value
    updateReg = memory[address];

    // Update N and Z flags
    cpu.P.bits.N = (updateReg & 0x80) != 0;
    cpu.P.bits.Z = (updateReg == 0);
}

//Load Value from immediate address
void LoadImmediate(uint8_t& updateReg) {
    updateReg = memory[cpu.PC++];

    // Update N and Z flags
    cpu.P.bits.N = (updateReg & 0x80) != 0;
    cpu.P.bits.Z = (updateReg == 0);
}

//Return  effictive memory address using immediate addressing mode
uint16_t ZP_Address(uint8_t index) {
    uint8_t baseAddress = memory[cpu.PC++];
    uint16_t effAddress = (baseAddress + index) & 0xFF;

    return effAddress; 
}

//Return the effective address using (indexed) addressing mode
uint16_t absAddress(uint8_t index) {

    //Read the address byte
    uint8_t lowByte = memory[cpu.PC++];
    uint8_t highByte = memory[cpu.PC++];

    //Shift byte to calculate effictive address
    uint16_t baseAddress = (highByte << 8) | lowByte;
    uint16_t address = (baseAddress + index) & 0xFFFF;

    return address;
}

//Return the effective address using (indirect, X) addressing mode
uint16_t X_indirectAddress() {
    //Read operand
    uint8_t operand = memory[cpu.PC++];

    //Add X register to get to zero-page address
    uint8_t lowByteAddress = (operand + cpu.X) & 0xFF;
    uint8_t highByteAddress = (operand + cpu.X + 1) & 0xFF;

    //Read the two address byte from zero-page
    uint8_t lowByte = memory[lowByteAddress];
    uint8_t highByte = memory[highByteAddress];

    //Combine the two bytes to get effective 16-bit address
    uint16_t effAddress = (highByte << 8) | lowByte;

    return effAddress;
}

//Return the effective memory address using (Y, indirect) addressing mode
uint16_t Y_indirectAddress() {
    //Read zero-page pointer location for low byte
    uint8_t lowByteAddress = memory[cpu.PC++];
    //Next byte in zero-page is pointer to high byte
    uint8_t highByteAddress = (lowByteAddress + 1) & 0xFF;

    //Read the two address byte from zero-page
    uint8_t lowByte = memory[lowByteAddress];
    uint8_t highByte = memory[highByteAddress];

    //Combine the two bytes to get effective 16-bit address
    uint16_t effAddress = ((highByte << 8) | lowByte) + cpu.Y;

    return effAddress;
}

//Transferring first variable to second variable
void Transfer(uint8_t R, uint8_t& Q) {

    Q = R;
    // Update N and Z flags
    cpu.P.bits.N = (Q & 0x80) != 0;
    cpu.P.bits.Z = (Q == 0);
}

//Implement Add with carry
void ADC(uint8_t operand) {

    //If Decimal flag is clear, perform normal binary addition
    if (cpu.P.bits.D == 0) {
        // Add accumulator, operand, and carry
        int16_t temp_result = cpu.A + operand + cpu.P.bits.C;

        // Carry Flag is set (result > 255)
        cpu.P.bits.C = (temp_result > 0xFF);

        // Overflow flag is set if signed overflow occurs.
        // This happens when two numbers with the same sign produce
            // a result with a different sign.
        uint8_t result8 = temp_result & 0xFF;
        cpu.P.bits.V = ((~(cpu.A ^ operand) & (cpu.A ^ result8)) & 0x80) != 0;

        cpu.A = result8; // Store only the low 8 bits
    }

    // If Decimal flag is set, perform BCD addition
    if (cpu.P.bits.D == 1) {
        //Add the low nibbles
        uint8_t lowNibble = (cpu.A & 0x0F) + (operand & 0x0F) + cpu.P.bits.C;

        //Adjust for valid BCD if result exceeds 9
        if (lowNibble > 9) {
            cpu.P.bits.C = 1;
            lowNibble -= 10;
        }
        else {
            cpu.P.bits.C = 0;
        }

        //Add the high nibbles
        uint8_t highNibble = (cpu.A >> 4) + (operand >> 4) + cpu.P.bits.C;

        //Adjust for valid BCD if result exceeds 9
        if (highNibble > 9) {
            cpu.P.bits.C = 1;
            highNibble -= 10;
        }
        else {
            cpu.P.bits.C = 0;
        }

        //Combine the two results into single byte and Store
        cpu.A = (highNibble << 4) | lowNibble;   
    }

    // Update N and Z flags
    cpu.P.bits.N = (cpu.A & 0x80) != 0;
    cpu.P.bits.Z = (cpu.A == 0);
}

//Implement Subtract with carry
void SBC(uint8_t operand) {
    //If decimal flag is clear perform binary subtraction
    if (cpu.P.bits.D == 0){
        //result = A + (~operand) + C
        uint16_t tempResult = cpu.A + (~operand) + cpu.P.bits.C;

        //set carry flag if no borrow happened
        cpu.P.bits.C = (tempResult < 0x100);

        //signed overflow flag
            // This happens when the sign of the result differs from A
            // while A and operand originally had different signs.
        uint8_t result8 = tempResult & 0xFF;
        cpu.P.bits.V = (((cpu.A ^ operand) & (cpu.A ^ result8)) & 0x80) != 0;

        cpu.A = result8;    //store only the low 8-bits
    }

    // If Decimal flag is set, perform BCD subtraction
    if (cpu.P.bits.D == 1) {
        //Save the carry flag for low nibble subtraction
        uint8_t carryLow = cpu.P.bits.C;
        uint8_t carryHigh;

        //Subtract the lower nibble
        int8_t lowNibble = (cpu.A & 0x0F) - (operand & 0x0F) - (1 - carryLow);

        //If result is negative, borrow from high nibble
        if (lowNibble < 0) {
            carryHigh = 0;
            lowNibble += 10;
        }
        else {
            carryHigh = 1;
        }

        //Subtract the high nibble
        int8_t highNibble = (cpu.A >> 4) - (operand >> 4) - (1 - carryHigh);

        //If result is negative, borrow occured
        if (highNibble < 0) {
            cpu.P.bits.C = 0;
            highNibble += 10;
        }
        else {
            cpu.P.bits.C = 1;
        }

        //COmbine the two results and Store
        cpu.A = (highNibble << 4) | lowNibble; 
    }

    //set N and Z bit flag
    cpu.P.bits.N = (cpu.A & 0x80) != 0;
    cpu.P.bits.Z = (cpu.A == 0);
}

//And the accumulator
void AND(uint8_t M) {
    cpu.A = cpu.A & M;

    //set N and Z bit flag
    cpu.P.bits.N = (cpu.A & 0x80) != 0;
    cpu.P.bits.Z = (cpu.A == 0);
}

//XOR the accumulator
void EOR(uint8_t M) {
    cpu.A = cpu.A ^ M;

    //set N and Z bit flag
    cpu.P.bits.N = (cpu.A & 0x80) != 0;
    cpu.P.bits.Z = (cpu.A == 0);
}

//OR the accumulator
void ORA(uint8_t M) {
    cpu.A = cpu.A | M;

    //set N and Z bit flag
    cpu.P.bits.N = (cpu.A & 0x80) != 0;
    cpu.P.bits.Z = (cpu.A == 0);
}

//Bit Testing without changing the accumulator
void BIT(uint8_t M) {
    //set flags
    cpu.P.bits.Z = (cpu.A & M) == 0;
    cpu.P.bits.N = (M & 0x80) != 0;
    cpu.P.bits.V = (M & 0x40) != 0;
}

//Increment the operand
void Increment(uint8_t& operand) {
    operand = (operand + 1) & 0xFF;

    //set N and Z bit flag
    cpu.P.bits.N = (operand & 0x80) != 0;
    cpu.P.bits.Z = (operand == 0);
}

//Decrement the operand
void Decrement(uint8_t& operand) {
    operand = (operand - 1) & 0xFF;

    //set N and Z bit flag
    cpu.P.bits.N = (operand & 0x80) != 0;
    cpu.P.bits.Z = (operand == 0);
}

//Shift all bits to left by one bit
void ASL(uint8_t& M) {
    //MSB is stored as carry
    cpu.P.bits.C = (M & 0x80) != 0;   

    M = M << 1;   //Shift left

    //set N and Z bit flag
    cpu.P.bits.N = (M & 0x80) != 0;
    cpu.P.bits.Z = (M == 0);
}

//Shift all bits to right by one bit
void LSR(uint8_t& M) {
    //LSB is stored as carry
    cpu.P.bits.C = (M & 0x01) != 0;

    M = M >> 1;   //Shift right

    //set N and Z bit flag
    cpu.P.bits.N = (M & 0x80) != 0;
    cpu.P.bits.Z = (M == 0);
}

//Rotate left by one bit
void ROL(uint8_t& M) {
    uint8_t oldCarry = cpu.P.bits.C;  //store the original carry
    
    cpu.P.bits.C = (M & 0x80) != 0;   //MSB becomes new carry

    M = (M << 1) | oldCarry;    //LSB is replaced with previous carry

    //set N and Z bit flag
    cpu.P.bits.N = (M & 0x80) != 0;
    cpu.P.bits.Z = (M == 0);
}

//Rotate right by one bit
void ROR(uint8_t& M) {
    uint8_t oldCarry = cpu.P.bits.C << 7;  //store the original carry

    cpu.P.bits.C = (M & 0x01) != 0;   //LSB becomes new carry

    M = (M >> 1) | oldCarry;   //MSB is replaced with previous carry

    //set N and Z bit flag
    cpu.P.bits.N = (M & 0x80) != 0;
    cpu.P.bits.Z = (M == 0);
}

//Push register status to Stack memory
void pushStack(uint8_t value) {
    memory[0x100 + cpu.SP] = value;   // store value at stack
    cpu.SP = (cpu.SP - 1) & 0xFF;     // decrement SP
}

//Pull register status from Stack memory
uint8_t pullStack() {
    cpu.SP = (cpu.SP + 1) & 0xFF;  //increment SP
    return memory[0x100 + cpu.SP];  //return the value from stack
}

//CMP- compare register value with given value
void Compare(uint8_t RegValue, uint8_t M) {
    uint8_t tempResult = (RegValue - M) & 0xFF;

    //set the flags
    cpu.P.bits.C = (RegValue >= M);
    cpu.P.bits.N = (tempResult & 0x80) != 0;
    cpu.P.bits.Z = (tempResult == 0);
}

//Main program function
int main() {
    //Load memory
    load_program();
    
    //Start from PC at 400 (for this specific bin instruction set)
    cpu.PC = 0x0400;
    cpu.SP = 0xFF;      //No stack memory is being used at this point
    cpu.P.bits.unused = 1;

    while (1) {       

        // Fetch
        uint8_t opcode = memory[cpu.PC++];

        // Decode and Execute
        switch (opcode) {

                /*Load and Store Accumulator, Index*/
        // LDA Immediate
        case 0xA9: {
            LoadImmediate(cpu.A);
            break;
        }

        //LDA (Zero page)
        case 0xA5: {
            uint16_t effAddress = ZP_Address(0);   //0 - for not having index
            LoadRegister(cpu.A, effAddress);
            break;
        }

        //LDA - zero page (X)
        case 0xB5: {
            uint16_t effAddress = ZP_Address(cpu.X);
            LoadRegister(cpu.A, effAddress);
            break;
        }
        
        //LDA Absolute
        case 0xAD: {
            uint16_t effAddress = absAddress(0);   //0- for not having index
            LoadRegister(cpu.A, effAddress);
            break;
        }

        //LDA Absolute, X
        case 0xBD: {
            uint16_t effAddress = absAddress(cpu.X);
            LoadRegister(cpu.A, effAddress);
            break;
        }

        //LDA Absolute, Y
        case 0xB9: {
            uint16_t effAddress = absAddress(cpu.Y);
            LoadRegister(cpu.A, effAddress);
            break;
        }

        //LDA - indirec X
        case 0xA1: {
            uint16_t effAddress = X_indirectAddress();
            LoadRegister(cpu.A, effAddress);
            break;
        }

        //LDA - indirect, Y
        case 0xB1: {
            uint16_t effAddress = Y_indirectAddress();
            LoadRegister(cpu.A, effAddress);
            break;
        }

                 /*Load Index X*/        
        //LDX immediate
        case 0xA2: {
            LoadImmediate(cpu.X);
            break;
        }

        //LDX - zero page
        case 0xA6: {
            uint16_t address = ZP_Address(0);  //0- for not having index
            LoadRegister(cpu.X, address);
            break;
        }

        //LDX - zero page, Y
        case 0xB6: {
            uint16_t address = ZP_Address(cpu.Y);
            LoadRegister(cpu.X, address);
            break;
        }

        //LDX - absolute
        case 0xAE: {
            uint16_t effAddress = absAddress(0);
            LoadRegister(cpu.X, effAddress);
            break;
        }

        //LDX - absolute, Y
        case 0xBE: {
            uint16_t effAddress = absAddress(cpu.Y);
            LoadRegister(cpu.X, effAddress);
            break;
        }

        //LDY immediate
        case 0xA0: {
            LoadImmediate(cpu.Y);
            break;
        }

        //LDY - zero page
        case 0xA4: {
            uint16_t address = ZP_Address(0);  //0- for not having index
            LoadRegister(cpu.Y, address);
            break;
        }

        //LDY - zero page, X
        case 0xB4: {
            uint16_t address = ZP_Address(cpu.X);
            LoadRegister(cpu.Y, address);
            break;
        }

        //LDY - absolute
        case 0xAC: {
            uint16_t effAddress = absAddress(0);
            LoadRegister(cpu.Y, effAddress);
            break;
        }

        //LDY - absolute, X
        case 0xBC: {
            uint16_t effAddress = absAddress(cpu.X);
            LoadRegister(cpu.Y, effAddress);
            break;
        }

        //STA Zero page
        case 0x85: {
            uint16_t address = memory[cpu.PC++];

            memory[address] = cpu.A;
            break;
        }

        //STA - zero page, X
        case 0x95: {
            uint16_t effAddress = ZP_Address(cpu.X);
            memory[effAddress] = cpu.A;
            break;
        }

        // STA Absolute
        case 0x8D: {            
            uint16_t effAddress = absAddress(0);
            memory[effAddress] = cpu.A;
            break;
        }

        // STA Absolute, X
        case 0x9D: {
            uint16_t effAddress = absAddress(cpu.X);
            memory[effAddress] = cpu.A;
            break;
        }

        // STA Absolute, Y
        case 0x99: {
            uint16_t effAddress = absAddress(cpu.Y);
            memory[effAddress] = cpu.A;
            break;
        }

        //STA - indirect X
        case 0x81: {
            uint16_t effAddress = X_indirectAddress();  //pass the index
            memory[effAddress] = cpu.A;
            break;
        }

        //STA - indirect Y
        case 0x91: {
            uint16_t effAddress = Y_indirectAddress();  //pass the index
            memory[effAddress] = cpu.A;
            break;
        }

        //STX - zero page
        case 0x86: {
            uint16_t address = memory[cpu.PC++];
            memory[address] = cpu.X;
            break;
        }

        //STX - zero page, Y
        case 0x96: {
            uint16_t effAddress = ZP_Address(cpu.Y);
            memory[effAddress] = cpu.X;
            break;
        }

        //STX - absolute
        case 0x8E: {
            uint16_t address = absAddress(0);  //0 - for no index
            memory[address] = cpu.X;
            break;
        }

        //STY - zero page
        case 0x84: {
            uint16_t address = memory[cpu.PC++];

            memory[address] = cpu.Y;
            break;
        }

        //STY - zero page, X
        case 0x94: {
            uint16_t effAddress = ZP_Address(cpu.X);
            memory[effAddress] = cpu.Y;
            break;
        }

        //STY - absolute
        case 0x8C: {
            uint16_t address = absAddress(0);  //0 - for no index
            memory[address] = cpu.Y;
            break;
        }

                 /*Register Transfer*/
        //TAX - Transfer Accumulator to X
        case 0xAA: {
            Transfer(cpu.A, cpu.X);
            break;
        }

        //TAY - Transfer Accumulator to Y
        case 0xA8: {
            Transfer(cpu.A, cpu.Y);
            break;
        }

        //TXA - Transfer X Accumulator
        case 0x8A: {
            Transfer(cpu.X, cpu.A);
            break;
        }

        //TYA - Transfer Y to Accumulator
        case 0x98: {
            Transfer(cpu.Y, cpu.A);
            break;
        }
                 /*Stack Operations*/
        //TXS - Transfer X to Stack Pointer
        case 0x9A: {
            cpu.SP = cpu.X;   //this opcode does not change flags
            break;
        }

        //TSX - Transfer Stack Pointer to X
        case 0xBA: {
            Transfer(cpu.SP, cpu.X);
            break;
        }

        //PHA - Push Accumulator on Stack
        case 0x48: {
            pushStack(cpu.A);
            break;
        }

        //PLA - pull accumulator from stack
        case 0x68: {
            cpu.A = pullStack();

            // Update N and Z flags
            cpu.P.bits.N = (cpu.A & 0x80) != 0;
            cpu.P.bits.Z = (cpu.A == 0);
            break;
        }

        //PHP - push processor status on stack
        case 0x08: {
            uint8_t status = cpu.P.byte | 0x30;
            pushStack(status);  //bit 4,5 always pushed as 1
            break;
        }

        //PLP - pull processor status from stack
        case 0x28: {
            uint8_t stack = pullStack();

            cpu.P.byte = (stack & 0xCF) | 0x20;  //clear bit 4,5 and then set bit-5 
            break;
        }           

                    /*Arithmetics*/
        // ADC Immediate
        case 0x69: {
            uint8_t operand = memory[cpu.PC++];
            ADC(operand);   //add operand to A with carry            
            break;
        }

        //ADC - Zero page
        case 0x65: {
            uint16_t address = memory[cpu.PC++];
            uint8_t operand = memory[address];

            ADC(operand);  //Add operand to A with carry
            break;
        }

        //ADC - Zero page, X
        case 0x75: {
            uint16_t effAddress = ZP_Address(cpu.X);
            ADC(memory[effAddress]);
            break;
        }

        //ADC- Absolute
        case 0x6D: {            
            uint16_t effAddress = absAddress(0);
            ADC(memory[effAddress]);  //operand is located at effAddress
            break;
        }

        //ADC - Absolute, X
        case 0x7D: {
            uint16_t effAddress = absAddress(cpu.X);
            ADC(memory[effAddress]);
            break;
        }

        //ADC - Absolute, Y
        case 0x79:{
            uint16_t effAddress = absAddress(cpu.Y);
            ADC(memory[effAddress]);
            break;
        }

        //ADC - Indirect, X
        case 0x61: {
            uint16_t effAddress = X_indirectAddress();
            ADC(memory[effAddress]);
            break;
        }

        //ADC - Indirect, Y
        case 0x71: {
            uint16_t effAddress = Y_indirectAddress();
            ADC(memory[effAddress]);
            break;
        }

        //SBC - Immediate
        case 0xE9: {
            uint8_t operand = memory[cpu.PC++];
            SBC(operand);
            break;
        }

        //SBC Zero Page
        case 0xE5: {
            uint8_t address = memory[cpu.PC++];            
            SBC(memory[address]);  //operand is at memory address
            break;
        }

        //SBC - Zero page, X
        case 0xF5: {
            uint16_t effAddress = ZP_Address(cpu.X);
            SBC(memory[effAddress]); //operand is at memory address
            break;
        }

        //SBC- Absolute
        case 0xED: {
            uint16_t effAddress = absAddress(0);
            SBC(memory[effAddress]);  //operand is located at effAddress
            break;
        }

        //SBC - Absolute, X
        case 0xFD: {
            uint16_t effAddress = absAddress(cpu.X);
            SBC(memory[effAddress]);
            break;
        }

        //SBC - Absolute, Y
        case 0xF9: {
            uint16_t effAddress = absAddress(cpu.Y);
            SBC(memory[effAddress]);
            break;
        }

        //SBC - Indirect, X
        case 0xE1: {
            uint16_t effAddress = X_indirectAddress();
            SBC(memory[effAddress]);
            break;
        }

        //SBC - Indirect, Y
        case 0xF1: {
            uint16_t effAddress = Y_indirectAddress();
            SBC(memory[effAddress]);
            break;
        }

                 /*Logical operations*/
        //AND - immediate
        case 0x29: {
            uint8_t operand = memory[cpu.PC++];
            AND(operand);
            break;
        }

        //AND - Zero page
        case 0x25: {
            uint8_t address = memory[cpu.PC++];
            uint8_t operand = memory[address];

            AND(operand);
            break;
        }

        //AND - Zero page, X
        case 0x35: {
            uint16_t address = ZP_Address(cpu.X);
            uint8_t operand = memory[address];

            AND(operand);
            break;
        }

        //AND - Absolute
        case 0x2D: {
            uint16_t address = absAddress(0);
            uint8_t operand = memory[address];

            AND(operand);
            break;
        }
        
        //AND - Absolute, X
        case 0x3D: {
            uint16_t address = absAddress(cpu.X);
            uint8_t operand = memory[address];

            AND(operand);
            break;
        }

        //AND - Absolute, Y
        case 0x39: {
            uint16_t address = absAddress(cpu.Y);
            uint8_t operand = memory[address];

            AND(operand);
            break;
        }

        //AND - Indirect, X
        case 0x21: {
            uint16_t address = X_indirectAddress();
            uint8_t operand = memory[address];

            AND(operand);
            break;
        }

        //AND - Indirect, Y
        case 0x31: {
            uint16_t address = Y_indirectAddress();
            uint8_t operand = memory[address];

            AND(operand);
            break;
        }

        //EOR - immediate
        case 0x49: {
            uint8_t operand = memory[cpu.PC++];
            EOR(operand);
            break;
        }

        //EOR - Zero page
        case 0x45: {
            uint8_t address = memory[cpu.PC++];
            uint8_t operand = memory[address];

            EOR(operand);
            break;
        }

        //EOR - Zero page, X
        case 0x55: {
            uint16_t address = ZP_Address(cpu.X);
            uint8_t operand = memory[address];

            EOR(operand);
            break;
        }

        //EOR - Absolute
        case 0x4D: {
            uint16_t address = absAddress(0);
            uint8_t operand = memory[address];

            EOR(operand);
            break;
        }

        //EOr - Absolute, X
        case 0x5D: {
            uint16_t address = absAddress(cpu.X);
            uint8_t operand = memory[address];

            EOR(operand);
            break;
        }

        //EOR - Absolute, Y
        case 0x59: {
            uint16_t address = absAddress(cpu.Y);
            uint8_t operand = memory[address];

            EOR(operand);
            break;
        }

         //EOR - Indirect, X
        case 0x41: {
            uint16_t address = X_indirectAddress();
            uint8_t operand = memory[address];

            EOR(operand);
            break;
        }

        //EOR - Indirect, Y
        case 0x51: {
            uint16_t address = Y_indirectAddress();
            uint8_t operand = memory[address];

            EOR(operand);
            break;
        }

        //ORA - immediate
        case 0x09: {
            uint8_t operand = memory[cpu.PC++];
            ORA(operand);
            break;
        }

        //ORA - Zero page
        case 0x05: {
            uint8_t address = memory[cpu.PC++];
            uint8_t operand = memory[address];

            ORA(operand);
            break;
        }

        //ORA - Zero page, X
        case 0x15: {
            uint16_t address = ZP_Address(cpu.X);
            uint8_t operand = memory[address];

            ORA(operand);
            break;
        }

        //ORA - Absolute
        case 0x0D: {
            uint16_t address = absAddress(0);
            uint8_t operand = memory[address];

            ORA(operand);
            break;
        }

        //ORA - Absolute, X
        case 0x1D: {
            uint16_t address = absAddress(cpu.X);
            uint8_t operand = memory[address];

            ORA(operand);
            break;
        }

        //ORA - Absolute, Y
        case 0x19: {
            uint16_t address = absAddress(cpu.Y);
            uint8_t operand = memory[address];

            ORA(operand);
            break;
        }

        //ORA - Indirect, X
        case 0x01: {
            uint16_t address = X_indirectAddress();
            uint8_t operand = memory[address];

            ORA(operand);
            break;
        }

        //ORA - Indirect, Y
        case 0x11: {
            uint16_t address = Y_indirectAddress();
            uint8_t operand = memory[address];

            ORA(operand);
            break;
        }

        //BIT - zero page
        case 0x24: {
            uint8_t address = memory[cpu.PC++];
            uint8_t operand = memory[address];

            BIT(operand);
            break;
        }

        //BIT - absolute
        case 0x2C: {
            uint16_t address = absAddress(0);   //0 - for no index
            uint8_t operand = memory[address];

            BIT(operand);
            break;
        }

                 /*Increment/Decrement*/
        //INC - Zero page
        case 0xE6: {
            uint8_t address = memory[cpu.PC++];
            Increment(memory[address]);            
            break;
        }

        //INC - Zero page, X
        case 0xF6: {
            uint16_t address = ZP_Address(cpu.X);
            Increment(memory[address]);
            break;
        }

        //INC - Absolute
        case 0xEE: {
            uint16_t address = absAddress(0);   //0 - for no index
            Increment(memory[address]);
            break;
        }

        //INC - Absolute, X
        case 0xFE: {
            uint16_t address = absAddress(cpu.X);
            Increment(memory[address]);
            break;
        }

        //INX
        case 0xE8: {
            Increment(cpu.X);
            break;
        }

        //INY
        case 0xC8: {
            Increment(cpu.Y);
            break;
        }

        //DEC - zero page
        case 0xC6: {
            uint8_t address = memory[cpu.PC++];
            Decrement(memory[address]);
            break;
        }

        //DEC - Zero page, X
        case 0xD6: {
            uint16_t address = ZP_Address(cpu.X);
            Decrement(memory[address]);
            break;
        }

        //DEC - Absolute
        case 0xCE: {
            uint16_t address = absAddress(0);   //0 - for no index
            Decrement(memory[address]);
            break;
        }

        //DEC - Absolute, X
        case 0xDE: {
            uint16_t address = absAddress(cpu.X);
            Decrement(memory[address]);
            break;
        }

        //DEX
        case 0xCA: {
            Decrement(cpu.X);
            break;
        }
         
        //DEY
        case 0x88: {
            Decrement(cpu.Y);
            break;
        }
        
                 /*Shifts and Rotates*/
        //ASL - accumulator
        case 0x0A: {
            ASL(cpu.A);
            break;
        }

        //ASL - Zero page
        case 0x06: {
            uint16_t address = memory[cpu.PC++];
            ASL(memory[address]);
            break;
        }

        //ASL - Zero page, X
        case 0x16: {
            uint16_t address = ZP_Address(cpu.X);
            ASL(memory[address]);
            break;
        }

        //ASL - Absolute
        case 0x0E: {
            uint16_t address = absAddress(0);   //0 - for no index
            ASL(memory[address]);
            break;
        }

        //ASL - Absolute, X
        case 0x1E: {
            uint16_t address = absAddress(cpu.X);
            ASL(memory[address]);
            break;
        }

        //LSR - Accumulator
        case 0x4A: {
            LSR(cpu.A);
            break;
        }

        //LSR - Zero page
        case 0x46: {
            uint16_t address = memory[cpu.PC++];
            LSR(memory[address]);
            break;
        }

        //LSR - Zero page, X
        case 0x56: {
            uint16_t address = ZP_Address(cpu.X);
            LSR(memory[address]);
            break;
        }

        //LSR - Absolute
        case 0x4E: {
            uint16_t address = absAddress(0);   //0 - for no index
            LSR(memory[address]);
            break;
        }

        //LSR - Absolute, X
        case 0x5E: {
            uint16_t address = absAddress(cpu.X);
            LSR(memory[address]);
            break;
        }
        
        //ROL - Accumulator
        case 0x2A: {
            ROL(cpu.A);
            break;
        }

        //ROL - Zero page
        case 0x26: {
            uint16_t address = memory[cpu.PC++];
            ROL(memory[address]);
            break;
        }

        //ROL - Zero page, X
        case 0x36: {
            uint16_t address = ZP_Address(cpu.X);
            ROL(memory[address]);
            break;
        }

        //ROL - Absolute
        case 0x2E: {
            uint16_t address = absAddress(0);   //0 - for no index
            ROL(memory[address]);
            break;
        }

        //ROL - Absolute, X
        case 0x3E: {
            uint16_t address = absAddress(cpu.X);
            ROL(memory[address]);
            break;
        }

        //ROR - Accumulator
        case 0x6A: {
            ROR(cpu.A);
            break;
        }

        //ROR - Zero page
        case 0x66: {
            uint16_t address = memory[cpu.PC++];
            ROR(memory[address]);
            break;
        }

        //ROR - Zero page, X
        case 0x76: {
            uint16_t address = ZP_Address(cpu.X);
            ROR(memory[address]);
            break;
        }

        //ROR - Absolute
        case 0x6E: {
            uint16_t address = absAddress(0);   //0 - for no index
            ROR(memory[address]);
            break;
        }

        //ROR - Absolute, X
        case 0x7E: {
            uint16_t address = absAddress(cpu.X);
            ROR(memory[address]);
            break;
        }

                 /*Set flags*/
        //CLC - Clear carry
        case 0x18: {
            cpu.P.bits.C = 0;
            break;
        }

        //SEC - set carry
        case 0x38: {
            cpu.P.bits.C = 1;
            break;
        }

        //CLD - clear decimal
        case 0xD8: {
            cpu.P.bits.D = 0;
            break;
        }

        //SED - Set decimal flag
        case 0xF8: {
            cpu.P.bits.D = 1;
            break;
        }

        //SEI - Set interrupt disable
        case 0x78: {
            cpu.P.bits.I = 1;
            break;
        }

        //CLI - Clear interrupt disable
        case 0x58: {
            cpu.P.bits.I = 0;
            break;
        }

        //CLV - Clear overflow flag
        case 0xB8: {
            cpu.P.bits.V = 0;
            break;
        }

        //RIT
        case 0x40: {            
            cpu.P.byte = pullStack();  //pull processor status

            uint8_t lowByte = pullStack();   //pull low byte first
            uint8_t highByte = pullStack();  //pull hihg byte

            cpu.PC = (highByte << 8) | lowByte;  
            break;
        }

                 /*compare operations*/
        //CMP - immediate
        case 0xC9: {
            uint8_t operand = memory[cpu.PC++];
            Compare(cpu.A, operand);
            break;
        }

        //CMP - Zero page
        case 0xC5: {
            uint8_t address = memory[cpu.PC++];
            Compare(cpu.A, memory[address]);
            break;
        }

        //CMP - Zero Page, X
        case 0xD5: {
            uint16_t address = ZP_Address(cpu.X);
            Compare(cpu.A, memory[address]);
            break;
        }

        //CMP - Absolute
        case 0xCD: {
            uint16_t address = absAddress(0);  //0 - for no index
            Compare(cpu.A, memory[address]);
            break;
        }

        //CMP - Absolute, X
        case 0xDD: {
            uint16_t address = absAddress(cpu.X);
            Compare(cpu.A, memory[address]);
            break;
        }

        //CMP - Absolute, Y
        case 0xD9: {
            uint16_t address = absAddress(cpu.Y);
            Compare(cpu.A, memory[address]);
            break;
        }

        //CMP - indirect, X
        case 0xC1: {
            uint16_t address = X_indirectAddress();
            Compare(cpu.A, memory[address]);
            break;
        }

        //CMP - indirect, Y
        case 0xD1: {
            uint16_t address = Y_indirectAddress();
            Compare(cpu.A, memory[address]);
            break;
        }

        //CPX - immediate
        case 0xE0: {
            uint8_t operand = memory[cpu.PC++];
            Compare(cpu.X, operand);
            break;
        }

        //CPX - Zero page
        case 0xE4: {
            uint8_t address = memory[cpu.PC++];
            Compare(cpu.X, memory[address]);
            break;
        }

        //CPX - Absolute
        case 0xEC: {
            uint16_t address = absAddress(0);  //0 - for no index
            Compare(cpu.X, memory[address]);
            break;
        }

        //CPY - immediate
        case 0xC0: {
            uint8_t operand = memory[cpu.PC++];
            Compare(cpu.Y, operand);
            break;
        }

        //CPY - Zero page
        case 0xC4: {
            uint8_t address = memory[cpu.PC++];
            Compare(cpu.Y, memory[address]);
            break;
        }

        //CPY - Absolute
        case 0xCC: {
            uint16_t address = absAddress(0);  //0 - for no index
            Compare(cpu.Y, memory[address]);
            break;
        }

                    /*branches and jumps*/
        //JMP - absolute
        case 0x4C: {
            uint16_t address = absAddress(0);  //0 - for no index
            cpu.PC = address;
            break;
        }

        //JMP - Indirect
        case 0x6C: {
            uint8_t low = memory[cpu.PC++];
            uint8_t high = memory[cpu.PC++];
            uint16_t lowPointer = (high << 8) | low;    // address Pointer

            uint8_t wrappedLow = (low + 1) & 0xFF;        //wrap it up in within the same page
            uint16_t highPointer = (high << 8) | wrappedLow;

            uint8_t lowByte = memory[lowPointer];
            uint8_t highByte = memory[highPointer];

            cpu.PC = (highByte << 8) | lowByte;        //Set new PC
            break;
        }

        //JSR - jump to subroutine (save first, then jump)
        case 0x20: {
            uint16_t address = absAddress(0);    //0 - for no index

            uint8_t highByte = ((cpu.PC - 1) >> 8) & 0xFF;
            uint8_t lowByte = (cpu.PC - 1) & 0xFF;

            //save original PC to Stack
            pushStack(highByte);
            pushStack(lowByte);

            cpu.PC = address;   //set new PC
            break;
        }

        //RTS - return from subroutine
        case 0x60: {
            uint8_t lowByte = pullStack();
            uint8_t highByte = pullStack();

            uint16_t address = (highByte << 8) | lowByte;

            cpu.PC = address + 1;  //restore PC
            break;
        }

        //BNE - branch if Z = 0
        case 0xD0: {
            int8_t jumpByte = memory[cpu.PC++];
            if (cpu.P.bits.Z == 0) {
                cpu.PC += jumpByte;
            }
            break;
        }

        //BEQ - branch if Z = 1
        case 0xF0: {
            int8_t jumpByte = memory[cpu.PC++];
            if (cpu.P.bits.Z == 1)
                cpu.PC += jumpByte;
            break;
        }

        //BCC - branch if C = 0
        case 0x90: {
            int8_t jumpByte = memory[cpu.PC++];
            if (cpu.P.bits.C == 0)
                cpu.PC += jumpByte;
            break;
        }

        //BCS- branch if C = 1
        case 0xB0: {
            int8_t jumpByte = memory[cpu.PC++];
            if (cpu.P.bits.C == 1)
                cpu.PC += jumpByte;
            break;
        }

        //BPL - branch if N = 0
        case 0x10: {
            int8_t jumpByte = memory[cpu.PC++];
            if (cpu.P.bits.N == 0) {
                cpu.PC = cpu.PC + jumpByte;
            }
            break;
        }

        //BMI- branch if N = 1
        case 0x30: {
            int8_t jumpByte = memory[cpu.PC++];
            if (cpu.P.bits.N == 1)
                cpu.PC += jumpByte;
            break;
        }

        //BVC - branch if V = 0
        case 0x50: {
            int8_t jumpByte = memory[cpu.PC++];
            if (cpu.P.bits.V == 0)
                cpu.PC += jumpByte;
            break;
        }

        //BVS- branch if V = 1
        case 0x70: {
            int8_t jumpByte = memory[cpu.PC++];
            if (cpu.P.bits.V == 1)
                cpu.PC += jumpByte;
            break;
        }

                /*system*/
        //Do Nothing
        case 0xEA: {
            break;
        }

        // BRK Implied
        case 0x00: {
            cpu.PC++;  //BRK advanced PC by 2

            uint8_t highByte = (cpu.PC >> 8) & 0xFF;
            uint8_t lowByte = (cpu.PC & 0xFF);

            //push PC and then processor status on stack
            pushStack(highByte);
            pushStack(lowByte);

            uint8_t status = cpu.P.byte | 0x30;
            pushStack(status);  //bit 4,5 always pushed as 1
                        
            cpu.P.bits.I = 1;     //set interrupt disabled
            
            //New PC address
            uint8_t low = memory[0xFFFE];
            uint8_t high = memory[0xFFFF];
            uint16_t address = (high << 8) | low;
                        
            cpu.PC = address;    //Load new PC
            break;
        }

        default: {
            goto brk;
        }
        }

        check_result();

        //Delaying each cycle for visual purpose
        this_thread::sleep_for(chrono::milliseconds(10));
    }
brk:

    check_result();
    return 0;
}