From a7475d69c8ac73275cc2b9272778436bc9dcd65f Mon Sep 17 00:00:00 2001 From: Mason Reed Date: Mon, 21 Sep 2026 09:27:18 -0400 Subject: [PATCH 1/3] [MSP430] Stop emitting new branch target for existing conditional true target Fixes https://github.com/Vector35/binaryninja-api/issues/8516 --- arch/msp430/src/lift.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/msp430/src/lift.rs b/arch/msp430/src/lift.rs index 0630b18bd4..4aab84afd1 100644 --- a/arch/msp430/src/lift.rs +++ b/arch/msp430/src/lift.rs @@ -135,7 +135,7 @@ macro_rules! conditional_jump { ($addr:ident, $inst:ident, $cond:ident, $il:ident) => { let true_addr = offset_to_absolute($addr, $inst.offset()); let false_addr = $addr + $inst.size() as u64; - let mut new_true = true; + let mut new_true = false; let mut new_false = false; let mut true_label = $il.label_for_address(true_addr).unwrap_or_else(|| { From f197a5477f62ee95ce6a7a69623fcc1a38a97503 Mon Sep 17 00:00:00 2001 From: Mason Reed Date: Mon, 21 Sep 2026 09:34:29 -0400 Subject: [PATCH 2/3] [MSP430] Fix erroneous byte immediate sign extensions Fixes https://github.com/Vector35/binaryninja-api/issues/8517 --- arch/msp430/src/lift.rs | 32 ++++++++++++++++---------------- 1 file changed, 16 insertions(+), 16 deletions(-) diff --git a/arch/msp430/src/lift.rs b/arch/msp430/src/lift.rs index 4aab84afd1..57a4842e4c 100644 --- a/arch/msp430/src/lift.rs +++ b/arch/msp430/src/lift.rs @@ -173,7 +173,7 @@ pub(crate) fn lift_instruction(inst: &Instruction, addr: u64, il: &LowLevelILMut let dest = lift_source_operand(inst.source(), size, il); let op = match inst.operand_width() { Some(OperandWidth::Byte) => { - il.sx(2, il.rrc(size, dest, src).with_flag_write(FlagWrite::All)) + il.zx(2, il.rrc(size, dest, src).with_flag_write(FlagWrite::All)) } Some(OperandWidth::Word) | None => { il.rrc(size, dest, src).with_flag_write(FlagWrite::All) @@ -195,7 +195,7 @@ pub(crate) fn lift_instruction(inst: &Instruction, addr: u64, il: &LowLevelILMut let dest = lift_source_operand(inst.source(), size, il); let op = match inst.operand_width() { Some(OperandWidth::Byte) => { - il.sx(2, il.ror(size, dest, src).with_flag_write(FlagWrite::Cnz)) + il.zx(2, il.ror(size, dest, src).with_flag_write(FlagWrite::Cnz)) } Some(OperandWidth::Word) | None => { il.ror(size, dest, src).with_flag_write(FlagWrite::Cnz) @@ -291,7 +291,7 @@ pub(crate) fn lift_instruction(inst: &Instruction, addr: u64, il: &LowLevelILMut let size = width_to_size(inst.operand_width()); let src = match inst.operand_width() { OperandWidth::Byte => il - .sx(2, lift_source_operand(inst.source(), size, il)) + .zx(2, lift_source_operand(inst.source(), size, il)) .build(), OperandWidth::Word => lift_source_operand(inst.source(), size, il), }; @@ -304,7 +304,7 @@ pub(crate) fn lift_instruction(inst: &Instruction, addr: u64, il: &LowLevelILMut let dest = lift_source_operand(inst.destination(), size, il); let op = match inst.operand_width() { OperandWidth::Byte => { - il.sx(2, il.add(size, src, dest).with_flag_write(FlagWrite::All)) + il.zx(2, il.add(size, src, dest).with_flag_write(FlagWrite::All)) } OperandWidth::Word => il.add(size, src, dest).with_flag_write(FlagWrite::All), }; @@ -323,7 +323,7 @@ pub(crate) fn lift_instruction(inst: &Instruction, addr: u64, il: &LowLevelILMut let dest = lift_source_operand(inst.destination(), size, il); let op = match inst.operand_width() { OperandWidth::Byte => { - il.sx(2, il.sub(size, src, dest).with_flag_write(FlagWrite::All)) + il.zx(2, il.sub(size, src, dest).with_flag_write(FlagWrite::All)) } OperandWidth::Word => il.sub(size, src, dest).with_flag_write(FlagWrite::All), }; @@ -358,7 +358,7 @@ pub(crate) fn lift_instruction(inst: &Instruction, addr: u64, il: &LowLevelILMut let src = lift_source_operand(inst.source(), size, il); let dest = lift_source_operand(inst.destination(), size, il); let op = match inst.operand_width() { - OperandWidth::Byte => il.sx(2, il.and(size, il.not(size, src), dest)), + OperandWidth::Byte => il.zx(2, il.and(size, il.not(size, src), dest)), OperandWidth::Word => il.and(size, il.not(size, src), dest), }; two_operand!(inst.destination(), il, op); @@ -369,7 +369,7 @@ pub(crate) fn lift_instruction(inst: &Instruction, addr: u64, il: &LowLevelILMut let src = lift_source_operand(inst.source(), size, il); let dest = lift_source_operand(inst.destination(), size, il); let op = match inst.operand_width() { - OperandWidth::Byte => il.sx(2, il.or(size, src, dest)), + OperandWidth::Byte => il.zx(2, il.or(size, src, dest)), OperandWidth::Word => il.or(size, src, dest), }; two_operand!(inst.destination(), il, op); @@ -381,7 +381,7 @@ pub(crate) fn lift_instruction(inst: &Instruction, addr: u64, il: &LowLevelILMut let dest = lift_source_operand(inst.destination(), size, il); let op = match inst.operand_width() { OperandWidth::Byte => { - il.sx(2, il.xor(size, src, dest).with_flag_write(FlagWrite::Nvz)) + il.zx(2, il.xor(size, src, dest).with_flag_write(FlagWrite::Nvz)) } OperandWidth::Word => il.xor(size, src, dest).with_flag_write(FlagWrite::Nvz), }; @@ -395,7 +395,7 @@ pub(crate) fn lift_instruction(inst: &Instruction, addr: u64, il: &LowLevelILMut let dest = lift_source_operand(inst.destination(), size, il); let op = match inst.operand_width() { OperandWidth::Byte => { - il.sx(2, il.and(size, src, dest).with_flag_write(FlagWrite::Nz)) + il.zx(2, il.and(size, src, dest).with_flag_write(FlagWrite::Nz)) } OperandWidth::Word => il.and(size, src, dest).with_flag_write(FlagWrite::Nz), }; @@ -449,7 +449,7 @@ pub(crate) fn lift_instruction(inst: &Instruction, addr: u64, il: &LowLevelILMut }; let dest = lift_source_operand(&inst.destination().unwrap(), size, il); let op = match inst.operand_width() { - Some(OperandWidth::Byte) => il.sx( + Some(OperandWidth::Byte) => il.zx( 2, il.sub(size, dest, il.const_int(size, 1)) .with_flag_write(FlagWrite::All), @@ -467,7 +467,7 @@ pub(crate) fn lift_instruction(inst: &Instruction, addr: u64, il: &LowLevelILMut }; let dest = lift_source_operand(&inst.destination().unwrap(), size, il); let op = match inst.operand_width() { - Some(OperandWidth::Byte) => il.sx( + Some(OperandWidth::Byte) => il.zx( 2, il.sub(size, dest, il.const_int(size, 2)) .with_flag_write(FlagWrite::All), @@ -491,7 +491,7 @@ pub(crate) fn lift_instruction(inst: &Instruction, addr: u64, il: &LowLevelILMut }; let dest = lift_source_operand(&inst.destination().unwrap(), size, il); let op = match inst.operand_width() { - Some(OperandWidth::Byte) => il.sx( + Some(OperandWidth::Byte) => il.zx( 2, il.add(size, dest, il.const_int(size, 1)) .with_flag_write(FlagWrite::All), @@ -509,7 +509,7 @@ pub(crate) fn lift_instruction(inst: &Instruction, addr: u64, il: &LowLevelILMut }; let dest = lift_source_operand(&inst.destination().unwrap(), size, il); let op = match inst.operand_width() { - Some(OperandWidth::Byte) => il.sx( + Some(OperandWidth::Byte) => il.zx( 2, il.add(size, dest, il.const_int(size, 2)) .with_flag_write(FlagWrite::All), @@ -528,7 +528,7 @@ pub(crate) fn lift_instruction(inst: &Instruction, addr: u64, il: &LowLevelILMut let dest = lift_source_operand(&inst.destination().unwrap(), size, il); let op = match inst.operand_width() { Some(OperandWidth::Byte) => { - il.sx(2, il.not(size, dest).with_flag_write(FlagWrite::Nvz)) + il.zx(2, il.not(size, dest).with_flag_write(FlagWrite::Nvz)) } Some(OperandWidth::Word) | None => { il.not(size, dest).with_flag_write(FlagWrite::Nvz) @@ -564,7 +564,7 @@ pub(crate) fn lift_instruction(inst: &Instruction, addr: u64, il: &LowLevelILMut let dest = lift_source_operand(&inst.destination().unwrap(), size, il); let op = match inst.operand_width() { Some(OperandWidth::Byte) => { - il.sx(2, il.rol(size, dest, src).with_flag_write(FlagWrite::All)) + il.zx(2, il.rol(size, dest, src).with_flag_write(FlagWrite::All)) } Some(OperandWidth::Word) | None => { il.rol(size, dest, src).with_flag_write(FlagWrite::All) @@ -581,7 +581,7 @@ pub(crate) fn lift_instruction(inst: &Instruction, addr: u64, il: &LowLevelILMut let dest = lift_source_operand(&inst.destination().unwrap(), size, il); let op = match inst.operand_width() { Some(OperandWidth::Byte) => { - il.sx(2, il.rlc(size, dest, src).with_flag_write(FlagWrite::All)) + il.zx(2, il.rlc(size, dest, src).with_flag_write(FlagWrite::All)) } Some(OperandWidth::Word) | None => { il.rlc(size, dest, src).with_flag_write(FlagWrite::All) From 7fd6c922873ded6c1e3e5b7b97725144bb61016c Mon Sep 17 00:00:00 2001 From: Mason Reed Date: Mon, 21 Sep 2026 09:41:13 -0400 Subject: [PATCH 3/3] [MSP430] Fix SUB operand ordering Fixes https://github.com/Vector35/binaryninja-api/issues/8503 --- arch/msp430/src/lift.rs | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/msp430/src/lift.rs b/arch/msp430/src/lift.rs index 57a4842e4c..cad7029776 100644 --- a/arch/msp430/src/lift.rs +++ b/arch/msp430/src/lift.rs @@ -323,9 +323,9 @@ pub(crate) fn lift_instruction(inst: &Instruction, addr: u64, il: &LowLevelILMut let dest = lift_source_operand(inst.destination(), size, il); let op = match inst.operand_width() { OperandWidth::Byte => { - il.zx(2, il.sub(size, src, dest).with_flag_write(FlagWrite::All)) + il.zx(2, il.sub(size, dest, src).with_flag_write(FlagWrite::All)) } - OperandWidth::Word => il.sub(size, src, dest).with_flag_write(FlagWrite::All), + OperandWidth::Word => il.sub(size, dest, src).with_flag_write(FlagWrite::All), }; two_operand!(inst.destination(), il, op); auto_increment!(inst.source(), il);