added qspi raw support via symbols for giga, h7 and c33

Author: cristidragomir97

libraries/QSPI/README.md

@@ -27,6 +27,8 @@
 	status = "okay";
 };
 
+qspi_flash: &n25q128a1 {};
+
 &i2c4 {
 	status = "okay";
 	gc2145: gc2145@3c {
@@ -334,22 +336,6 @@
 };
 
 
-&quadspi {
-	pinctrl-0 = <&quadspi_clk_pf10 &quadspi_bk1_ncs_pg6
-		&quadspi_bk1_io0_pd11 &quadspi_bk1_io1_pd12
-		&quadspi_bk1_io2_pe2 &quadspi_bk1_io3_pf6>;
-	pinctrl-names = "default";
-	status = "okay";
-
-	qspi_flash: qspi-nor-flash@0 {
-		compatible = "st,stm32-qspi-nor";
-		reg = <0>;
-		size = <DT_SIZE_M(128)>; /* 128 Mbits (16 MB) */
-		qspi-max-frequency = <72000000>;
-		spi-bus-width = <4>;
-		status = "okay";
-	};
-};
 
 &flash0 {
 	partitions {

variants/arduino_giga_r1_stm32h747xx_m7/arduino_giga_r1_stm32h747xx_m7.overlay

@@ -5,6 +5,8 @@
 	};
 };
 
+qspi_flash: &at25sf128a {};
+
 &flash0 {
 	partitions {
 		mcuboot: partition@0 {

variants/arduino_portenta_c33_r7fa6m5bh3cfc/arduino_portenta_c33_r7fa6m5bh3cfc.overlay

@@ -110,3 +110,8 @@ CONFIG_SYSTEM_WORKQUEUE_STACK_SIZE=2048
 CONFIG_BT_RX_STACK_SIZE=4096
 
 CONFIG_STM32H7_BOOT_M4_AT_INIT=n
+
+CONFIG_FLASH=y
+CONFIG_FLASH_STM32_QSPI=y
+CONFIG_FLASH_MAP=y
+CONFIG_FLASH_PAGE_LAYOUT=y

variants/arduino_portenta_h7_stm32h747xx_m7/arduino_portenta_h7_stm32h747xx_m7.conf

@@ -14,6 +14,7 @@
 	status = "okay";
 };
 
+
 &i2c3 {
 	status = "okay";
 
@@ -389,3 +390,9 @@ qspi_flash: &mx25l12833f {};
 			      <&adc1 13>; /* Hack for D20 */
 	};
 };
+
+
+/* QSPI flash (MX25L12833F) is already configured in arduino_portenta_h7-common.dtsi
+ * with the correct pins: IO2=PF7, IO3=PD13 (different from Giga R1!)
+ */
+qspi_flash: &mx25l12833f {};