From d8cae7c179c0256e62582516ea0b73b7ee6bbfd7 Mon Sep 17 00:00:00 2001 From: "A. Molzer" <5550310+197g@users.noreply.github.com> Date: Fri, 27 Feb 2026 07:40:50 +0100 Subject: [PATCH] [zerocopy] Re-enable big endian aarch64 types When initially released the LLVM semantics did not agree with the intrinsics in the order of lanes and hence they got removed from stable on big endian targets. The fix of these semantics was shipped with Rust 1.87 in March 2025 (). To keep the library working in these previous compiler versions the intrinsics are enabled by their prior condition, a little endian target is detected, or the feature detection cfg of the more recent rust release is present. --- .github/workflows/ci.yml | 27 +++++++++++++++++++++++++++ Cargo.toml | 5 +++++ src/impls.rs | 12 ++++++++---- 3 files changed, 40 insertions(+), 4 deletions(-) diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml index 3ed8893ea6..6f620851b2 100644 --- a/.github/workflows/ci.yml +++ b/.github/workflows/ci.yml @@ -61,6 +61,7 @@ jobs: "no-zerocopy-generic-bounds-in-const-fn-1-61-0", "no-zerocopy-target-has-atomics-1-60-0", "no-zerocopy-aarch64-simd-1-59-0", + "no-zerocopy-aarch64-simd-be-1-87-0", "no-zerocopy-panic-in-const-and-vec-try-reserve-1-57-0" ] target: [ @@ -103,6 +104,8 @@ jobs: features: "--all-features" - toolchain: "no-zerocopy-aarch64-simd-1-59-0" features: "--all-features" + - toolchain: "no-zerocopy-aarch64-simd-be-1-87-0" + features: "--all-features" - toolchain: "no-zerocopy-panic-in-const-and-vec-try-reserve-1-57-0" features: "--all-features" # Exclude any combination for the zerocopy-derive crate which @@ -129,6 +132,8 @@ jobs: toolchain: "no-zerocopy-target-has-atomics-1-60-0" - crate: "zerocopy-derive" toolchain: "no-zerocopy-aarch64-simd-1-59-0" + - crate: "zerocopy-derive" + toolchain: "no-zerocopy-aarch64-simd-be-1-87-0" - crate: "zerocopy-derive" toolchain: "no-zerocopy-panic-in-const-and-vec-try-reserve-1-57-0" # Exclude stable/wasm since wasm is no longer provided via rustup on @@ -157,6 +162,28 @@ jobs: target: "thumbv6m-none-eabi" - toolchain: "no-zerocopy-aarch64-simd-1-59-0" target: "wasm32-unknown-unknown" + # Exclude non-aarch64 targets from the `no-zerocopy-aarch64-simd-be-1-87-0` + # toolchain. + - toolchain: "no-zerocopy-aarch64-simd-be-1-87-0" + target: "i686-unknown-linux-gnu" + - toolchain: "no-zerocopy-aarch64-simd-be-1-87-0" + target: "x86_64-unknown-linux-gnu" + - toolchain: "no-zerocopy-aarch64-simd-be-1-87-0" + target: "arm-unknown-linux-gnueabi" + - toolchain: "no-zerocopy-aarch64-simd-be-1-87-0" + target: "powerpc-unknown-linux-gnu" + - toolchain: "no-zerocopy-aarch64-simd-be-1-87-0" + target: "powerpc64-unknown-linux-gnu" + - toolchain: "no-zerocopy-aarch64-simd-be-1-87-0" + target: "riscv64gc-unknown-linux-gnu" + - toolchain: "no-zerocopy-aarch64-simd-be-1-87-0" + target: "s390x-unknown-linux-gnu" + - toolchain: "no-zerocopy-aarch64-simd-be-1-87-0" + target: "x86_64-pc-windows-msvc" + - toolchain: "no-zerocopy-aarch64-simd-be-1-87-0" + target: "thumbv6m-none-eabi" + - toolchain: "no-zerocopy-aarch64-simd-be-1-87-0" + target: "wasm32-unknown-unknown" # Exclude most targets from the `no-zerocopy-core-error-1-81-0` # toolchain since the `no-zerocopy-core-error-1-81-0` feature is unrelated to # compilation target. This only leaves i686 and x86_64 targets. diff --git a/Cargo.toml b/Cargo.toml index 429ee35e0c..16757bfb01 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -79,6 +79,11 @@ no-zerocopy-target-has-atomics-1-60-0 = "1.60.0" # versions, these types require the "simd-nightly" feature. no-zerocopy-aarch64-simd-1-59-0 = "1.59.0" +# Include SIMD types from `core::arch::aarch64` on big endian targets. Prior to +# 1.87.0 (#136831) the types were only correct on little endian and backed off +# from stable in a breaking change. +no-zerocopy-aarch64-simd-be-1-87-0 = "1.87.0" + # Permit panicking in `const fn`s and calling `Vec::try_reserve`. no-zerocopy-panic-in-const-and-vec-try-reserve-1-57-0 = "1.57.0" diff --git a/src/impls.rs b/src/impls.rs index 02153b86c4..91f558aeb8 100644 --- a/src/impls.rs +++ b/src/impls.rs @@ -1352,10 +1352,14 @@ mod simd { ); #[cfg(not(no_zerocopy_aarch64_simd_1_59_0))] simd_arch_mod!( - // NOTE(https://github.com/rust-lang/stdarch/issues/1484): NEON intrinsics are currently - // broken on big-endian platforms. - #[cfg(all(target_arch = "aarch64", target_endian = "little"))] - #[cfg_attr(doc_cfg, doc(cfg(rust = "1.59.0")))] + #[cfg(any( + all(target_arch = "aarch64", target_endian = "little"), + all(target_arch = "aarch64", not(no_zerocopy_aarch64_simd_be_1_87_0)) + ))] + #[cfg_attr( + all(doc_cfg, target_endian = "little"), + doc(cfg(rust = "1.59.0")) + )] aarch64, aarch64, float32x2_t, float32x4_t, float64x1_t, float64x2_t, int8x8_t, int8x8x2_t, int8x8x3_t, int8x8x4_t, int8x16_t, int8x16x2_t, int8x16x3_t, int8x16x4_t, int16x4_t, int16x8_t, int32x2_t, int32x4_t, int64x1_t, int64x2_t, poly8x8_t, poly8x8x2_t, poly8x8x3_t,