From c5615fc1f3e68c296498fa51a93b7bd691861708 Mon Sep 17 00:00:00 2001 From: lfdevs <109842948+lfdevs@users.noreply.github.com> Date: Fri, 10 Apr 2026 00:28:39 +0800 Subject: [PATCH] bump(main/mesa): 26.2.0-devel-20260511 - Sync with upstream: https://gitlab.freedesktop.org/mesa/mesa/-/commit/e471e83a6581120214a67b91b5b5fa94ae7a5de1 - Remove unofficial support for Adreno 830, as upstream has added official support: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39874 - Remove unofficial support for Adreno 829, as upstream has added official support: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40655 - Remove unofficial support for Adreno 810, as upstream has added official support: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40613 - Remove patch "0019-UBWC_5-and-UBWC_6-support.patch", as upstream has merged it: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40758 - Update unofficial support for Adreno 825 from whitebelyash's patch: https://github.com/whitebelyash/mesa-unified/commit/efb4500439dca28f50bc6c874e271708dca2f821 --- packages/mesa/0003-fix-for-anon-file.patch | 10 +- .../mesa/0019-UBWC_5-and-UBWC_6-support.patch | 24 --- .../0020-unofficial-support-adreno-830.patch | 85 --------- ...nofficial-support-adreno-810-825-829.patch | 168 ------------------ .../0021-unofficial-support-adreno-825.patch | 41 +++++ .../0022-unofficial-support-adreno-722.patch | 34 ++++ packages/mesa/build.sh | 17 +- 7 files changed, 93 insertions(+), 286 deletions(-) delete mode 100644 packages/mesa/0019-UBWC_5-and-UBWC_6-support.patch delete mode 100644 packages/mesa/0020-unofficial-support-adreno-830.patch delete mode 100644 packages/mesa/0021-unofficial-support-adreno-810-825-829.patch create mode 100644 packages/mesa/0021-unofficial-support-adreno-825.patch create mode 100644 packages/mesa/0022-unofficial-support-adreno-722.patch diff --git a/packages/mesa/0003-fix-for-anon-file.patch b/packages/mesa/0003-fix-for-anon-file.patch index 06428da00d9..0cb80367abd 100644 --- a/packages/mesa/0003-fix-for-anon-file.patch +++ b/packages/mesa/0003-fix-for-anon-file.patch @@ -2,12 +2,12 @@ Fallback to `@TERMUX_PREFIX@/tmp` if env `XDG_RUNTIME_DIR` is not set. --- a/src/util/anon_file.c +++ b/src/util/anon_file.c -@@ -122,7 +122,7 @@ get_or_create_user_temp_dir(char* buf, size_t len) { +@@ -125,7 +125,7 @@ get_or_create_user_temp_dir(void) { return buf; } -- snprintf(buf, len, "/tmp/xdg-runtime-mesa-%ld", (long)getuid()); -+ snprintf(buf, len, "@TERMUX_PREFIX@/tmp/xdg-runtime-mesa-%ld", (long)getuid()); +- n = asprintf(&buf, "/tmp/xdg-runtime-mesa-%ld", (long)getuid()); ++ n = asprintf(&buf, "@TERMUX_PREFIX@/tmp/xdg-runtime-mesa-%ld", (long)getuid()); + if (n < 0) + return NULL; mesa_logd("%s: XDG_RUNTIME_DIR not set; falling back to temp dir %s", - __func__, buf); - if (stat(buf, &st) == 0) { diff --git a/packages/mesa/0019-UBWC_5-and-UBWC_6-support.patch b/packages/mesa/0019-UBWC_5-and-UBWC_6-support.patch deleted file mode 100644 index 487f6bf0219..00000000000 --- a/packages/mesa/0019-UBWC_5-and-UBWC_6-support.patch +++ /dev/null @@ -1,24 +0,0 @@ -From 2da45c609845854491c09bd26d9d8245834ea4af Mon Sep 17 00:00:00 2001 -From: Rob Clark -Date: Tue, 13 Jan 2026 10:58:51 -0800 -Subject: [PATCH] WIP: tu/kgsl: Add UBWC_5 and UBWC_6 support - -The #defines seem to map 1:1, so we can add support even without an -updated kgsl uabi header. ---- - src/freedreno/vulkan/tu_knl_kgsl.cc | 2 ++ - 1 file changed, 2 insertions(+) - -diff --git a/src/freedreno/vulkan/tu_knl_kgsl.cc b/src/freedreno/vulkan/tu_knl_kgsl.cc -index e3a49692e941..48a0f8802e1a 100644 ---- a/src/freedreno/vulkan/tu_knl_kgsl.cc -+++ b/src/freedreno/vulkan/tu_knl_kgsl.cc -@@ -1842,6 +1842,8 @@ tu_knl_kgsl_load(struct tu_instance *instance, int fd) - device->ubwc_config.macrotile_mode = FDL_MACROTILE_4_CHANNEL; - break; - case KGSL_UBWC_4_0: -+ case 5: -+ case 6: - device->ubwc_config.bank_swizzle_levels = 0x6; - device->ubwc_config.macrotile_mode = FDL_MACROTILE_8_CHANNEL; - break; diff --git a/packages/mesa/0020-unofficial-support-adreno-830.patch b/packages/mesa/0020-unofficial-support-adreno-830.patch deleted file mode 100644 index 33ae38135cb..00000000000 --- a/packages/mesa/0020-unofficial-support-adreno-830.patch +++ /dev/null @@ -1,85 +0,0 @@ -Modified based on Adreno 840, most features should work. - ---- a/src/freedreno/common/freedreno_devices.py -+++ b/src/freedreno/common/freedreno_devices.py -@@ -1499,28 +1499,6 @@ a8xx_gen2 = GPUProps( - has_fs_tex_prefetch = False, - ) - --# Totally fake, just to get cffdump to work: --add_gpus([ -- GPUId(chip_id=0x44050000, name="FD830"), -- ], A6xxGPUInfo( -- CHIP.A8XX, -- [a7xx_base, a7xx_gen3, a8xx_base], -- num_ccu = 6, -- num_slices = 3, -- tile_align_w = 64, -- tile_align_h = 32, -- tile_max_w = 16384, -- tile_max_h = 16384, -- num_vsc_pipes = 32, -- cs_shared_mem_size = 32 * 1024, -- wave_granularity = 2, -- fibers_per_sp = 128 * 2 * 16, -- magic_regs = dict( -- ), -- raw_magic_regs = [ -- ], -- )) -- - # For a8xx, the chicken bit and most other non-ctx reg - # programming moves into the kernel, and what remains - # should be easier to share between devices -@@ -1555,6 +1533,29 @@ a8xx_gen2_raw_magic_regs = [ - [A6XXRegs.REG_A8XX_PC_MODE_CNTL, 0x00003f00], - ] - -+# Modified based on Adreno 840, most features should work -+add_gpus([ -+ GPUId(chip_id=0x44050000, name="FD830"), -+ GPUId(chip_id=0xffff44050001, name="Adreno (TM) 830"), -+ ], A6xxGPUInfo( -+ CHIP.A8XX, -+ [a7xx_base, a7xx_gen3, a8xx_base, a8xx_gen2, -+ GPUProps(shading_rate_matches_vk = True)], -+ num_ccu = 6, -+ num_slices = 3, -+ tile_align_w = 96, -+ tile_align_h = 32, -+ tile_max_w = 16416, -+ tile_max_h = 16384, -+ num_vsc_pipes = 32, -+ cs_shared_mem_size = 32 * 1024, -+ wave_granularity = 2, -+ fibers_per_sp = 128 * 2 * 16, -+ magic_regs = dict( -+ ), -+ raw_magic_regs = a8xx_gen2_raw_magic_regs, -+ )) -+ - add_gpus([ - GPUId(chip_id=0xffff44050A31, name="Adreno (TM) 840"), - ], A6xxGPUInfo( ---- a/src/freedreno/drm-shim/freedreno_noop.c -+++ b/src/freedreno/drm-shim/freedreno_noop.c -@@ -288,7 +288,7 @@ static const struct msm_device_info device_infos[] = { - }, - { - .gpu_id = 830, -- .chip_id = 0x44050000, -+ .chip_id = 0x44050001, - .gmem_size = 12 * 1024 * 1024, - }, - }; ---- a/src/freedreno/ir3/tests/disasm.c -+++ b/src/freedreno/ir3/tests/disasm.c -@@ -33,7 +33,7 @@ - #define INSTR_6XX_RAW(i, d, ...) { .gpu_id = 630, .instr = NULL, .instr_raw = i, .expected = d, __VA_ARGS__ } - #define INSTR_7XX(i, d, ...) { .chip_id = 0x07030001, .instr = #i, .instr_raw = 0, .expected = d, __VA_ARGS__ } - #define INSTR_7XX_RAW(i, d, ...) { .chip_id = 0x07030001, .instr = NULL, .instr_raw = i, .expected = d, __VA_ARGS__ } --#define INSTR_8XX(i, d, ...) { .chip_id = 0x44050000, .instr = #i, .instr_raw = 0, .expected = d, __VA_ARGS__ } -+#define INSTR_8XX(i, d, ...) { .chip_id = 0x44050001, .instr = #i, .instr_raw = 0, .expected = d, __VA_ARGS__ } - /* clang-format on */ - - static const struct test { diff --git a/packages/mesa/0021-unofficial-support-adreno-810-825-829.patch b/packages/mesa/0021-unofficial-support-adreno-810-825-829.patch deleted file mode 100644 index de5f15b26d2..00000000000 --- a/packages/mesa/0021-unofficial-support-adreno-810-825-829.patch +++ /dev/null @@ -1,168 +0,0 @@ -freedreno: enable Adreno 810+825+829 - -The source code is from whitebelyash: -https://github.com/whitebelyash/mesa-tu8/commit/cce699c8b5423adf1ad60335356408767c6971aa -https://github.com/whitebelyash/mesa-tu8/commit/6422f965fa26c384a139aa8e070ac37e5a4b3e96 -https://github.com/whitebelyash/mesa-tu8/commit/16ada8f7816b9dcfb678136f48036880699027b3 - -diff --git a/src/freedreno/common/freedreno_devices.py b/src/freedreno/common/freedreno_devices.py -index 5cbd5d11504..ebeaab440a4 100644 ---- a/src/freedreno/common/freedreno_devices.py -+++ b/src/freedreno/common/freedreno_devices.py -@@ -1505,6 +1505,62 @@ a8xx_gen2 = GPUProps( - has_salu_int_narrowing_quirk = True - ) - -+a8xx_825 = GPUProps( -+ sysmem_vpc_attr_buf_size = 131072, -+ sysmem_vpc_pos_buf_size = 65536, -+ sysmem_vpc_bv_pos_buf_size = 32768, -+ sysmem_ccu_color_cache_fraction = CCUColorCacheFraction.FULL.value, -+ sysmem_per_ccu_color_cache_size = 128 * 1024, -+ sysmem_ccu_depth_cache_fraction = CCUColorCacheFraction.THREE_QUARTER.value, -+ sysmem_per_ccu_depth_cache_size = 96 * 1024, # TODO: check if 128 works too -+ gmem_vpc_attr_buf_size = 49152, -+ gmem_vpc_pos_buf_size = 24576, -+ gmem_vpc_bv_pos_buf_size = 32768, -+ gmem_ccu_color_cache_fraction = CCUColorCacheFraction.EIGHTH.value, -+ gmem_per_ccu_color_cache_size = 16 * 1024, -+ gmem_ccu_depth_cache_fraction = CCUColorCacheFraction.FULL.value, -+ gmem_per_ccu_depth_cache_size = 127 * 1024, -+) -+ -+a8xx_810 = GPUProps( -+ sysmem_vpc_attr_buf_size = 131072, -+ sysmem_vpc_pos_buf_size = 65536, -+ sysmem_vpc_bv_pos_buf_size = 32768, -+ # These values are maximum size of depth/color cache for current A8XX Gen2 sysmem configuration -+ # Bigger values cause an integer underflow in freedreno gmem calculations -+ sysmem_ccu_color_cache_fraction = CCUColorCacheFraction.FULL.value, -+ sysmem_per_ccu_color_cache_size = 32 * 1024, -+ sysmem_ccu_depth_cache_fraction = CCUColorCacheFraction.THREE_QUARTER.value, -+ sysmem_per_ccu_depth_cache_size = 32 * 1024, -+ gmem_vpc_attr_buf_size = 49152, -+ gmem_vpc_pos_buf_size = 24576, -+ gmem_vpc_bv_pos_buf_size = 32768, -+ gmem_ccu_color_cache_fraction = CCUColorCacheFraction.EIGHTH.value, -+ gmem_per_ccu_color_cache_size = 16 * 1024, -+ gmem_ccu_depth_cache_fraction = CCUColorCacheFraction.FULL.value, -+ gmem_per_ccu_depth_cache_size = 64 * 1024, -+ # FD810 does not support ray tracing -+ has_ray_intersection = False, -+ has_sw_fuse = False, -+) -+ -+a8xx_829 = GPUProps( -+ sysmem_vpc_attr_buf_size = 131072, -+ sysmem_vpc_pos_buf_size = 65536, -+ sysmem_vpc_bv_pos_buf_size = 32768, -+ sysmem_ccu_color_cache_fraction = CCUColorCacheFraction.FULL.value, -+ sysmem_per_ccu_color_cache_size = 128 * 1024, -+ sysmem_ccu_depth_cache_fraction = CCUColorCacheFraction.THREE_QUARTER.value, -+ sysmem_per_ccu_depth_cache_size = 96 * 1024, -+ gmem_vpc_attr_buf_size = 49152, -+ gmem_vpc_pos_buf_size = 24576, -+ gmem_vpc_bv_pos_buf_size = 32768, -+ gmem_ccu_color_cache_fraction = CCUColorCacheFraction.EIGHTH.value, -+ gmem_per_ccu_color_cache_size = 16 * 1024, -+ gmem_ccu_depth_cache_fraction = CCUColorCacheFraction.FULL.value, -+ gmem_per_ccu_depth_cache_size = 127 * 1024, -+) -+ - # For a8xx, the chicken bit and most other non-ctx reg - # programming moves into the kernel, and what remains - # should be easier to share between devices -@@ -1563,6 +1619,72 @@ add_gpus([ - raw_magic_regs = a8xx_gen2_raw_magic_regs, - )) - -+# gen8_6_0 -+add_gpus([ -+ GPUId(chip_id=0x44030000, name="FD825"), -+ ], A6xxGPUInfo( -+ CHIP.A8XX, -+ [a7xx_base, a7xx_gen3, a8xx_base, a8xx_825], -+ num_ccu = 4, -+ num_slices = 2, -+ tile_align_w = 64, -+ tile_align_h = 32, -+ tile_max_w = 16384, -+ tile_max_h = 16384, -+ num_vsc_pipes = 32, -+ cs_shared_mem_size = 32 * 1024, -+ wave_granularity = 2, -+ fibers_per_sp = 128 * 2 * 16, -+ magic_regs = dict( -+ ), -+ raw_magic_regs = a8xx_gen2_raw_magic_regs, -+ )) -+ -+# gen8_3_0 -+add_gpus([ -+ GPUId(chip_id=0x44010000, name="FD810"), -+ ], A6xxGPUInfo( -+ CHIP.A8XX, -+ [a7xx_base, a7xx_gen3, a8xx_base, a8xx_810], -+ num_ccu = 2, -+ num_slices = 1, -+ tile_align_w = 64, -+ tile_align_h = 32, -+ tile_max_w = 16384, -+ tile_max_h = 16384, -+ num_vsc_pipes = 32, -+ cs_shared_mem_size = 32 * 1024, -+ wave_granularity = 2, -+ fibers_per_sp = 128 * 2 * 16, -+ magic_regs = dict( -+ ), -+ raw_magic_regs = a8xx_gen2_raw_magic_regs, -+ )) -+ -+# TODO: Properly fill all values for this GPU -+# Very weird GPU, ugh.. -+add_gpus([ -+ GPUId(chip_id=0x44030A00, name="FD829"), # kgsl id??? -+ GPUId(chip_id=0x44030A20, name="FD829"), # found by testing -+ GPUId(chip_id=0xffff44030A00, name="FD829"), -+ ], A6xxGPUInfo( -+ CHIP.A8XX, -+ [a7xx_base, a7xx_gen3, a8xx_base, a8xx_829,], -+ num_ccu = 4, -+ num_slices = 2, -+ tile_align_w = 64, -+ tile_align_h = 32, -+ tile_max_w = 16384, -+ tile_max_h = 16384, -+ num_vsc_pipes = 32, -+ cs_shared_mem_size = 32 * 1024, -+ wave_granularity = 2, -+ fibers_per_sp = 128 * 2 * 16, -+ magic_regs = dict( -+ ), -+ raw_magic_regs = a8xx_gen2_raw_magic_regs, -+ )) -+ - add_gpus([ - GPUId(chip_id=0xffff44050A31, name="Adreno (TM) 840"), - ], A6xxGPUInfo( -diff --git a/src/freedreno/drm-shim/freedreno_noop.c b/src/freedreno/drm-shim/freedreno_noop.c -index 73ac6162a04..8bc1dbde164 100644 ---- a/src/freedreno/drm-shim/freedreno_noop.c -+++ b/src/freedreno/drm-shim/freedreno_noop.c -@@ -291,6 +291,16 @@ static const struct msm_device_info device_infos[] = { - .chip_id = 0x44050001, - .gmem_size = 12 * 1024 * 1024, - }, -+ { -+ .gpu_id = 810, -+ .chip_id = 0x44010000, -+ .gmem_size = 576 * 1024, -+ }, -+ { -+ .gpu_id = 829, -+ .chip_id = 0x44030A20, -+ .gmem_size = 2 * 1024 * 1024, -+ }, - }; - - static void diff --git a/packages/mesa/0021-unofficial-support-adreno-825.patch b/packages/mesa/0021-unofficial-support-adreno-825.patch new file mode 100644 index 00000000000..44a854239d1 --- /dev/null +++ b/packages/mesa/0021-unofficial-support-adreno-825.patch @@ -0,0 +1,41 @@ +freedreno/common: enable A825 + +The source code is from whitebelyash: +https://github.com/whitebelyash/mesa-unified/commit/efb4500439dca28f50bc6c874e271708dca2f821 + +diff --git a/src/freedreno/common/freedreno_devices.py b/src/freedreno/common/freedreno_devices.py +index 4b2a004af7c..9f9f914c9ec 100644 +--- a/src/freedreno/common/freedreno_devices.py ++++ b/src/freedreno/common/freedreno_devices.py +@@ -1423,6 +1423,31 @@ add_gpus([ + raw_magic_regs = a8xx_base_raw_magic_regs, + )) + ++add_gpus([ ++ GPUId(chip_id=0x44030000, name="Adreno (TM) 825"), ++ ], A6xxGPUInfo( ++ CHIP.A8XX, ++ [a7xx_base, a7xx_gen3, a8xx_base, a8xx_gen1, GPUProps( ++ # This is probably not an optimal config for gmem/sysmem, but it was working before and I don't have any 825 device to test (neither I have any trace info) ++ sysmem_ccu_color_cache_fraction = CCUColorCacheFraction.FULL.value, ++ sysmem_per_ccu_color_cache_size = 128 * 1024, ++ sysmem_ccu_depth_cache_fraction = CCUColorCacheFraction.THREE_QUARTER.value, ++ sysmem_per_ccu_depth_cache_size = 96 * 1024, ++ )], ++ num_ccu = 4, ++ num_slices = 2, ++ tile_align_w = 96, ++ tile_align_h = 32, ++ tile_max_w = 16416, ++ tile_max_h = 16384, ++ num_vsc_pipes = 32, ++ cs_shared_mem_size = 32 * 1024, ++ wave_granularity = 2, ++ fibers_per_sp = 128 * 2 * 16, ++ magic_regs = dict(), ++ raw_magic_regs = a8xx_base_raw_magic_regs, ++ )) ++ + add_gpus([ + GPUId(chip_id=0xffff44050A31, name="Adreno (TM) 840"), + ], A6xxGPUInfo( diff --git a/packages/mesa/0022-unofficial-support-adreno-722.patch b/packages/mesa/0022-unofficial-support-adreno-722.patch new file mode 100644 index 00000000000..62638d70c3d --- /dev/null +++ b/packages/mesa/0022-unofficial-support-adreno-722.patch @@ -0,0 +1,34 @@ +Created by, or sourced from, Vauzi-17 +https://github.com/Vauzi-17/710/commit/df5319f68ee857c598fffd18012d066c91ed5c08 + +diff --git a/src/freedreno/common/freedreno_devices.py b/src/freedreno/common/freedreno_devices.py +index 9f9f914c9ec..d1f4fa4712a 100644 +--- a/src/freedreno/common/freedreno_devices.py ++++ b/src/freedreno/common/freedreno_devices.py +@@ -1014,6 +1014,26 @@ add_gpus([ + raw_magic_regs = a730_raw_magic_regs, + )) + ++add_gpus([ ++ GPUId(chip_id=0x43020100, name="FD722"), ++ GPUId(chip_id=0xffff43020100, name="FD722"), ++ ], A6xxGPUInfo( ++ CHIP.A7XX, ++ [a7xx_base, a7xx_gen1], ++ num_ccu = 3, ++ tile_align_w = 64, ++ tile_align_h = 32, ++ tile_max_w = 1024, ++ tile_max_h = 1024, ++ num_vsc_pipes = 32, ++ cs_shared_mem_size = 32 * 1024, ++ wave_granularity = 2, ++ fibers_per_sp = 128 * 2 * 16, ++ highest_bank_bit = 16, ++ magic_regs = a730_magic_regs, ++ raw_magic_regs = a730_raw_magic_regs, ++ )) ++ + add_gpus([ + GPUId(chip_id=0x07030001, name="FD730"), # KGSL, no speedbin data + GPUId(chip_id=0xffff07030001, name="FD730"), # Default no-speedbin fallback diff --git a/packages/mesa/build.sh b/packages/mesa/build.sh index 49c58e7ad74..53a058e832f 100644 --- a/packages/mesa/build.sh +++ b/packages/mesa/build.sh @@ -3,10 +3,11 @@ TERMUX_PKG_DESCRIPTION="An open-source implementation of the OpenGL specificatio TERMUX_PKG_LICENSE="MIT" TERMUX_PKG_LICENSE_FILE="docs/license.rst" TERMUX_PKG_MAINTAINER="@termux" -TERMUX_PKG_VERSION="26.0.6" -TERMUX_PKG_SRCURL=https://archive.mesa3d.org/mesa-${TERMUX_PKG_VERSION}.tar.xz -TERMUX_PKG_SHA256=1d3c3b8a8363b8cc354175bb4a684ad8b035211cc1d6fa17aeb9b9623c513f89 -TERMUX_PKG_AUTO_UPDATE=true +TERMUX_PKG_VERSION="26.2.0" +TERMUX_PKG_SRCURL=git+https://gitlab.freedesktop.org/mesa/mesa +TERMUX_PKG_GIT_BRANCH=main +_COMMIT=e471e83a6581120214a67b91b5b5fa94ae7a5de1 +TERMUX_PKG_AUTO_UPDATE=false TERMUX_PKG_DEPENDS="libandroid-shmem, libc++, libdrm, libglvnd, libllvm (<< $TERMUX_LLVM_NEXT_MAJOR_VERSION), libwayland, libx11, libxext, libxfixes, libxshmfence, libxxf86vm, ncurses, vulkan-loader, zlib, zstd" TERMUX_PKG_SUGGESTS="mesa-dev" TERMUX_PKG_BUILD_DEPENDS="libclc, libwayland-protocols, libxrandr, llvm, llvm-tools, mlir, spirv-tools, xorgproto" @@ -34,6 +35,14 @@ TERMUX_PKG_EXTRA_CONFIGURE_ARGS=" " termux_step_post_get_source() { + if [ -n "${_COMMIT}" ]; then + # Ensure the requested commit is available when cloning shallow. + if git -C "$TERMUX_PKG_SRCDIR" rev-parse --is-shallow-repository | grep -q true; then + git -C "$TERMUX_PKG_SRCDIR" fetch --unshallow + fi + git -C "$TERMUX_PKG_SRCDIR" checkout "$_COMMIT" + fi + # Do not use meson wrap projects rm -rf subprojects }