From 1ab285acb67dabd99bbecae556141f864a183f03 Mon Sep 17 00:00:00 2001 From: Ettore Di Giacinto Date: Sun, 16 Aug 2026 20:51:56 +0000 Subject: [PATCH] fix(#1055): fold the two Darwin paragraphs into rows and take main out of red `scripts/check-public-doc-tables.py` exits 1 at `origin/main`: docs/BENCHMARKS.md carries 36 prose paragraphs against a 35 budget and docs/FEATURES.md 22 against 21. The checker runs in the `pre-push` hook and at `.github/workflows/ci.yml:160`, so the red is not confined to one branch; every push in the repository is refused, including pushes that touch neither page. The two paragraphs arrived at `e34d71379` (#1054), a two-character Apple Clang capture fix that also wrote one narrative paragraph into each page. Nothing about that fix was wrong; the pages simply had no paragraph left to spend. Each paragraph moves into the keyed row its content belongs to, which is what the checker's own message prescribes: "content belongs in table ROWS and prose only explains them". The Apple Clang build disposition becomes a `Darwin Qwen3.5 build repair` row in the docs/BENCHMARKS.md `Open gaps` table, beside the other rows that record NOT APPLICABLE and no-number-owed dispositions. The Apple Clang platform fact folds into the `Metal (Apple Silicon)` row of the docs/FEATURES.md backend table, which is where a macOS toolchain fact is keyed. Both sentences of each paragraph survive verbatim in substance; nothing is deleted, and the `max_prose_paragraphs` constants are untouched, because raising one is a checker semantic change that owes its own row, spec and red-before test. That redesign is real and it is somebody's: a whole-page paragraph count on a shared file is exactly the shape AGENTS.md Records rejects ("Limit an entry, not a shared file"), and `ENG-RECORD-CONFLICT-SURFACES` already scopes the removal of the doc-gating global counters. This change does not attempt it. It restores the gate and leaves the argument where its spec holds it. Evidence, each exit status captured directly and never through a pipe: red-before at `0f8580e269ceac5f4174c92cfdf79b386980b26b` exit 1, naming both pages; green-after exit 0. Armed on the fixed tree: appending one prose paragraph to docs/BENCHMARKS.md reports 36 of 35 and exits 1, appending one to docs/FEATURES.md reports 22 of 21 and exits 1, and both files restore to their recorded sha256. Against `origin/main`, docs/BENCHMARKS.md keeps 188 of 188 keyed rows byte-identical and adds 1, docs/FEATURES.md keeps 193 of 194 and changes only `Metal (Apple Silicon)`. The new cells measure 181 and 187 characters against MAX_CELL_CHARS = 220, and the rows 285 and 227 against MAX_ROW_CHARS = 600. This is a documentation change, so no build was run; a build would prove nothing about a paragraph count. FOLLOWING_AGENTS_PROTOCOL Following-Agents-Protocol: true AI-Assisted: true Assisted-by: AGENT:claude-opus-5 [claude-code] --- .agents/issue-index.md | 1 + docs/BENCHMARKS.md | 6 +----- docs/FEATURES.md | 6 +----- 3 files changed, 3 insertions(+), 10 deletions(-) diff --git a/.agents/issue-index.md b/.agents/issue-index.md index 88390082b..32baa1179 100644 --- a/.agents/issue-index.md +++ b/.agents/issue-index.md @@ -290,3 +290,4 @@ rather than merged. `scripts/check-agent-record.py` gates both. | [#1021](https://github.com/mudler/vllm.cpp/issues/1021) | — | LTX-2.5 **DiT device staging takes 450 s — 7.5 minutes — and no record names the phase**. MEASURED on `dgx.casa` (GB10, boot id `03717c9d-63c8-4652-a8fe-a63d012c5718`, build `0e1bee42f`, under `$HOME/gpu.lock`), per-PID at a nominal 2 s over 192 samples: CUDA compute-app footprint 4.22 -> **35.20 GiB**, GPU utilization mean **0.2%** with zero in **164/192** samples, CPU **0.15 cores of 20**, `Anonymous` +0.01 GiB. Neither GPU-bound nor CPU-bound. **The RATE is not one number and this row records the spread rather than the slower figure.** Recomputed from the counters: rung 1 stages 31723 MiB in 450 s = **70.5 MiB/s**; rung 2 stages the same ~32 GiB (`capp_mib` 4322 -> 36396 = 32074 MiB) in **251 s = 127.8 MiB/s** — same host, same boot id, same build, a **1.81x spread** that is itself unattributed, because the sampler recorded no system-wide load column. An earlier draft said "~52 MiB/s", which is the PLATEAU divided by the WHOLE 700 s run rather than by the staging window, and which contradicts its own inputs in both directions (450 s x 52 MiB/s = 22.9 GiB against a recorded 35.54 GiB plateau). Any row taking this lever must measure the rate itself rather than inherit either figure. The shape is `src/vllm/model_executor/models/ltx2_loader.cpp:738-756 @ 332aed738`: ~3,504 tensors, each a raw `cudaMalloc` (`backend.Alloc` at `:747`, `src/vt/cuda/cuda_backend.cu:77-81 @ 332aed738`) followed by a full `backend.Synchronize(queue)` at `:749`, serialized against the host read. The plateau at 36396 MiB = 35.54 GiB lands within 1% of the 35.32 GiB the loader contract predicts. Sampler CSV not retrievable ([#1040](https://github.com/mudler/vllm.cpp/issues/1040)). Same loop as [#1016](https://github.com/mudler/vllm.cpp/issues/1016); a row should take both. Listed under `## Owed` in [`ltx25-decode-speed.md`](specs/ltx25-decode-speed.md) | feature | | [#1024](https://github.com/mudler/vllm.cpp/issues/1024) | — | An LTX-2.5 render invoked with `--device cuda` **stages 35.54 GiB onto the GPU and then never uses it**. MEASURED on `dgx.casa` (GB10, boot id `03717c9d-63c8-4652-a8fe-a63d012c5718`, build `0e1bee42f`), 320x192/25f, per-PID over **347 samples**: GPU utilization never exceeded 2%, was **exactly 0 in 321/347**, and **every one of the 26 non-zero samples falls inside the DiT staging window** (t<=251 s) — so **every post-staging sample reads 0**, while the compute-app footprint sits flat at 36396 MiB and the process holds **exactly 1.00 core of 20** across the two `utime` windows this figure covers (+116.7 s over 117 s, +142.2 s over 142 s = **259 s of measurement**; §1.3 of the spec records a third window in the same regime, +648.9 s over 649 s, so 259 s is what these two cover and NOT the sampler's total, which the record cannot settle — [#1040](https://github.com/mudler/vllm.cpp/issues/1040)); 0 frames written. **This row states sample counts and states NO minute figure, because no consistent one exists.** Drafts variously said "17+ minutes" here and "over 15 minutes" over "the first 1192 s" in the spec; 347 samples at a 2 s cadence span 694 s, so neither fits, and no dropped-sample rate was ever recorded. The GPU-zero half is over EVERY sample; the core-count half rests on 259 s. Staging took the device path (`Anonymous` stayed at 0.01 GiB, so no f32 widening — `src/vllm/multimodal/ltx2_video.cpp:786 @ 332aed738`). Leaves a disjunction this issue cannot yet split, because nothing timestamps a phase boundary ([#1010](https://github.com/mudler/vllm.cpp/issues/1010)): either the denoise is not taking `Ltx2DitForwardDevice` (`ltx2_video.cpp:2946` vs `:2948 @ 332aed738`), or it is and something before it burns the rest of the run single-threaded. Broader than [#1007](https://github.com/mudler/vllm.cpp/issues/1007): the 0% GPU is a property of the whole post-load render, not of the decode phase, so `docs/USAGE.md:873-874 @ 332aed738` understates it. **Owed: a positive control that `utilization.gpu` reads high for a real kernel on GB10** — this box already returns `[N/A]` for `--query-gpu=memory.used`. Sampler CSV not retrievable ([#1040](https://github.com/mudler/vllm.cpp/issues/1040)). Listed under `## Owed` in [`ltx25-decode-speed.md`](specs/ltx25-decode-speed.md) | bug | | [#1040](https://github.com/mudler/vllm.cpp/issues/1040) | — | `LTX25-DECODE-SPEED` ([#1006](https://github.com/mudler/vllm.cpp/issues/1006)) records three sets of PASSING measurements and **none has a retrievable evidence artifact**, which `.agents/verification.md` requires alongside the SHA, command, environment and exit status. Rung 1's 248 per-PID sampler rows, rung 2's 1082 rows and 347 side-car per-PID samples, rung 2's `run.log`, and §1.4's `~/work/ltx25-e2e/render8-console.log` all live only on `dgx.casa` — `ping -c 2 -W 3 dgx.casa` exits 1 with 100% packet loss and `Destination Host Unreachable` (checked 2026-08-16), this box's documented unified-memory OOM-reboot mode, which needs a physical power cycle. The spec's `REMOTE_UNVERIFIED` mark was correctly scoped to rung 2's EXIT REASON; this issue extends the same honesty to the passing numbers. **Second and more corrosive: neither rung's sampler cadence closes.** Rung 1 states 248 samples at 2 s over a 701 s run split 192+56 across 450 s and 164 s windows — at 2 s those windows hold 225 and 82, and 248 samples cover 496 s of 701. A draft of rung 2's §5 stated 347 per-PID samples at 2 s "over the first 1192 s" — at 2 s that window holds 596. No dropped-sample rate is recorded anywhere, so the wall each sample set covers is NOT derivable, and the spec now states sample counts and fractions rather than minute figures. The raw CSVs settle both in one pass. Filed while repairing the fresh review of [PR #1038](https://github.com/mudler/vllm.cpp/pull/1038); not fixable in that flow, because no edit to the tree produces a file on a host that does not answer. Listed under `## Owed` in [`ltx25-decode-speed.md`](specs/ltx25-decode-speed.md) | bug | +| [#1055](https://github.com/mudler/vllm.cpp/issues/1055) | `ENG-RECORD-CONFLICT-SURFACES` | `main` went RED on `check-public-doc-tables.py` at `e34d71379`: two prose paragraphs added beside a two-character source fix took docs/BENCHMARKS.md to 36 paragraphs of 35 and docs/FEATURES.md to 22 of 21, and the checker runs both in the `pre-push` hook and at `.github/workflows/ci.yml:160`, so every branch in the repository inherited a red it did not cause. Fixed in flow by folding each paragraph into the keyed row its content belongs to, which is what the checker's own message prescribes: the Apple Clang build disposition into the docs/BENCHMARKS.md `Open gaps` table, the Apple Clang platform fact into the docs/FEATURES.md backend table. No paragraph was deleted and no budget was raised. The deeper defect is the budget itself, a whole-page count on a shared file, which AGENTS.md Records names as the anti-pattern (`Limit an entry, not a shared file`); redesigning it is `ENG-RECORD-CONFLICT-SURFACES` scope, whose spec already carries the obligation | bug | diff --git a/docs/BENCHMARKS.md b/docs/BENCHMARKS.md index 5a6ff8ba0..f77738e80 100644 --- a/docs/BENCHMARKS.md +++ b/docs/BENCHMARKS.md @@ -456,11 +456,6 @@ built on it rather than keeping the flattering one. **CPU elementwise GEMM, transpose-free `[K,N]` path (2026-08-07).** On dgx aarch64 the `[K,N]` path beats `[N,K]` by 1.16x to 1.30x, byte-identically. The x86 arm is INDICATIVE ONLY, not binding: that box is VOID for timing per `CLAIM-KERNEL-CPU-ELEM-GEMM-1`. `VT_CPU_MATMUL_STEAL` ships default OFF and is NOT measured; it must justify itself by measurement and may measure neutral. -**Darwin Qwen3.5 build repair (2026-08-16).** Benchmarking is NOT APPLICABLE. -The change removes a redundant namespace-scope lambda capture that Apple Clang -rejects under `-Werror`; it does not change generated refusal text, model math, -or any runtime path. The binding gate is the Apple Clang build. - ## Open gaps | Track | Status | Next gate | @@ -474,6 +469,7 @@ or any runtime path. The binding gate is the Apple Clang build. | Accepted-and-inert serve args (`SERVE-RECIPE-ARGS`, #606) | **No number owed**: argument parsing only, so nothing to time and no oracle leg. Correctness gate 4 cases / 58 asserts GREEN, RED-first, mutation-proven | None. A speed axis would be fabricated; closes on review plus the operator gate rerun | | DeepSeek-V2-Lite MLA | Attributed miss, `ACTIVE` | Throughput at every concurrency | | Qwen3.5 text-only arms (#490) | **No number; run gates OWED**, both `PARTIAL`. The loader half is CLOSED (#740, #864 `DONE`), so what blocks these is hardware, not a refusal | No fitting ckpt for either causal-LM arm: no denominator. `Qwen3.8-2.4T-A95B` is ~4.8 TB vs 128 GB; its load plan resolves, which is not a token | +| Darwin Qwen3.5 build repair (#1054, 2026-08-16) | **NOT APPLICABLE.** Removing a redundant namespace-scope lambda capture that Apple Clang rejects under `-Werror` changes no generated refusal text, no model math and no runtime path | None. The binding gate is the Apple Clang build | | Qwen3.6-35B-A3B published BF16 (#740, #864) | **No number, and none was owed: the 2026-08-15 gate measured TOKENS.** Correctness MET vs the pinned oracle: 6/7 prompts STRICT 16/16, the 7th an exact tie (#910); SACRED 3/3 byte-identical | A throughput / latency / memory grid on this checkpoint. Nothing is measured, so nothing is claimed | | MoE vision tower image + video (#891) | **NOT gated, no number.** The 333 `model.visual.*` tensors load and the tower computes, on sm_110 FALLBACK attention, not the shipped GB10 path. The token-exact mm gates never ran | Both modality gates on GB10 through the shipped fast path, then a per-modality speed grid | | Dense image/video after the #891 merge (#908) | **UNVERIFIED, network-blocked.** Dense TEXT is 235/235 at `2f2bce926`, a true before/after (binary md5 `db889909d4…` vs `49ded1ece8…`, 500 TUs recompiled). The modality arms were not re-run | Re-run the dense image and video gates once the fixtures are reachable | diff --git a/docs/FEATURES.md b/docs/FEATURES.md index 38ce4449e..409f689b8 100644 --- a/docs/FEATURES.md +++ b/docs/FEATURES.md @@ -148,10 +148,6 @@ speed-pending, which [BENCHMARKS.md](BENCHMARKS.md) tracks. | `CohereForCausalLM` | Command-R / Cohere (and Cohere2) | scaffold: W0 tiny-random oracle run-verified; real-checkpoint gate blocked | no run | -The Qwen3.5 MoE loader also builds under Apple Clang with project warnings -promoted to errors. Its layout-refusal path uses the same messages and behavior -on every platform. - ### Standalone and non-registered lanes These run through dedicated forwards, not the `REGISTER_VLLM_MODEL` registry, so @@ -253,7 +249,7 @@ both refuse, naming what is missing. |---|---|---|---|---| | CUDA | ✅ sm_80 to sm_121a | ✅ | ✅ | ✅ | | CPU (x86, Arm i8mm; A76 assembly correct/default, llama speed gate open, and the closed 20-core floor ran a SUPERSEDED fork denominator rather than the stock `b10451` pin, re-take owed #1003) | ✅ | ◐ | ☐ | ✅ | -| Metal (Apple Silicon) | ✅ | ☐ | ☐ | ✅ | +| Metal (Apple Silicon) | ✅ builds under Apple Clang with project warnings promoted to errors, the Qwen3.5 MoE loader included; its layout-refusal path uses the same messages and behavior on every platform (#1054) | ☐ | ☐ | ✅ | | Vulkan | ◐ | ☐ | ☐ | ✅ | | ROCm | W0 verified on 5 gfx archs; dense and GDN models run all-native. Strict CPU parity is open in the measured near-tie regime (#269) | 44 registered ops including full GDN; ctest-green gfx1151/1103/1100/1201/1200 ([#41](https://github.com/mudler/vllm.cpp/issues/41)). APU managed allocation is unverified. [ROCM.md](ROCM.md) | ✅ | ✅ | | XPU / TPU | ☐ | ✅ | ◐ | ☐ |