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Generate IR code for the post increments of pointers
1 parent 31f86db commit d629c45

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3 files changed

+29
-8
lines changed

3 files changed

+29
-8
lines changed

src/mlir/cxx/mlir/codegen_expressions.cc

Lines changed: 23 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -741,6 +741,24 @@ auto Codegen::ExpressionVisitor::operator()(PostIncrExpressionAST* ast)
741741
expressionResult.value);
742742
return {loadOp};
743743
}
744+
if (control()->is_pointer(ast->baseExpression->type)) {
745+
auto loc = gen.getLocation(ast->firstSourceLocation());
746+
auto ptrTy =
747+
mlir::cast<mlir::cxx::PointerType>(expressionResult.value.getType());
748+
auto elementTy = ptrTy.getElementType();
749+
auto loadOp = mlir::cxx::LoadOp::create(gen.builder_, loc, elementTy,
750+
expressionResult.value);
751+
auto resultTy = gen.convertType(ast->baseExpression->type);
752+
auto intTy =
753+
mlir::cxx::IntegerType::get(gen.builder_.getContext(), 32, true);
754+
auto oneOp = mlir::cxx::IntConstantOp::create(
755+
gen.builder_, loc, intTy, ast->op == TokenKind::T_PLUS_PLUS ? 1 : -1);
756+
auto addOp =
757+
mlir::cxx::PtrAddOp::create(gen.builder_, loc, resultTy, loadOp, oneOp);
758+
mlir::cxx::StoreOp::create(gen.builder_, loc, addOp,
759+
expressionResult.value);
760+
return {loadOp};
761+
}
744762

745763
auto op =
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gen.emitTodoExpr(ast->firstSourceLocation(), to_string(ast->kind()));
@@ -1314,6 +1332,11 @@ auto Codegen::ExpressionVisitor::operator()(ImplicitCastExpressionAST* ast)
13141332
return expressionResult;
13151333
}
13161334

1335+
case ImplicitCastKind::kPointerConversion: {
1336+
auto expressionResult = gen.expression(ast->expression);
1337+
return expressionResult;
1338+
}
1339+
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default:
13181341
break;
13191342

src/mlir/cxx/mlir/codegen_statements.cc

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -186,6 +186,10 @@ void Codegen::StatementVisitor::operator()(SwitchStatementAST* ast) {
186186

187187
auto conditionResult = gen.expression(ast->condition);
188188

189+
if (!gen.switch_.defaultDestination) {
190+
gen.switch_.defaultDestination = endSwitchBlock;
191+
}
192+
189193
mlir::cxx::SwitchOp::create(
190194
gen.builder_, gen.getLocation(ast->firstSourceLocation()),
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conditionResult.value, gen.switch_.defaultDestination, {},

src/mlir/cxx/mlir/cxx_dialect_conversions.cc

Lines changed: 2 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -504,14 +504,8 @@ class IntegralCastOpLowering : public OpConversionPattern<cxx::IntegralCastOp> {
504504
}
505505

506506
if (targetType.getWidth() < sourceType.getWidth()) {
507-
// truncation
508-
if (isSigned) {
509-
rewriter.replaceOpWithNewOp<LLVM::TruncOp>(op, resultType,
510-
adaptor.getValue());
511-
} else {
512-
rewriter.replaceOpWithNewOp<LLVM::ZExtOp>(op, resultType,
513-
adaptor.getValue());
514-
}
507+
rewriter.replaceOpWithNewOp<LLVM::TruncOp>(op, resultType,
508+
adaptor.getValue());
515509
return success();
516510
}
517511

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