asmdiff.example.toml

# asmdiff config — named compiler+flags targets.
#
# Copy to one of the locations asmdiff searches (first hit wins):
#   1. the path given with --config
#   2. asmdiff.toml next to the SOURCE.c being compiled
#   3. asmdiff.toml in the current directory
#   4. ~/.config/asmdiff.toml
#
# Each [table] is a target usable as `-t/--target NAME`; the optional
# top-level `default` names the target(s) used when no --cc/--target
# is given.  It takes whatever -t takes: a target name, a [groups]
# name, a comma list, a glob, or an array mixing them
# (default = ["native", "esp32s3"]).
# [groups] names a matrix of those tables for one `-t GROUP` (comma
# lists and globs also work: `-t esp32c3,esp32s3`, `-t 'esp32c*'`).
# Compile at the flags your project ships with — that is the whole
# point of the tool.

default = "gcc"

[gcc]
cc = "gcc"
flags = [
  "-O3", "-Wall", "-Wextra",
  # Project-specific include paths and defines go here:
  # "-I/path/to/project/src", "-DMY_FEATURE",
]

[clang]
cc = "clang"
flags = ["-O3", "-Wall", "-Wextra"]

# The name the docs use for "your native compiler" (--target host): an
# alias of [gcc] kept as its own table so the examples work verbatim.
[host]
cc = "gcc"
flags = ["-O3", "-Wall", "-Wextra"]

# `-t GROUP` runs every named target.  `-t host` is still the [host]
# gcc alias above; use `-t native` (or `-t gcc,clang`) for both host
# compilers.  Does not change `default`.
[groups]
riscv32-esp = ["esp32c3", "esp32c6", "esp32h2", "esp32p4"]
xtensa-esp = ["esp32", "esp32s2", "esp32s3"]
esp = ["esp32", "esp32s2", "esp32s3", "esp32c3", "esp32c6", "esp32h2", "esp32p4"]
native = ["gcc", "clang"]

# --- Cost profiles ---------------------------------------------------
# A target may name a [costs.NAME] table; --cost then prints a
# weighted score next to the class counts, with the profile's
# provenance.  Weights are static issue costs in cycles, measured
# on hardware, approximate by nature; measured_on and method are
# required so a reader knows how approximate.  No profile ships
# measured yet: fill one in from your own board (see README,
# "Cost profiles") and consider contributing it.
#
# [costs.esp32s3-iram]
# measured_on = "ESP32-S3 rev 0.2, code in IRAM, esp-15.2.0 libgcc"
# method = "esp_cpu_get_cycle_count harness, median of 1000 runs"
# other = 1
# load = 2
# store = 1
# mul = 2
# div = 20
# branch = 2
# softfp = 60
# softfp-div = 200
# int-div = 40
# "__muldf3" = 90
#
# [esp32s3]
# ...
# costs = "esp32s3-iram"

# cc values may use ~, $VARS, and glob patterns.  A glob that matches
# several installed toolchains resolves to the highest version-sorted
# one (announced on stderr); pin the exact esp-NN directory instead if
# reproducibility across sessions matters more than convenience.
# On native Windows HOME is usually unset - use $USERPROFILE (or
# %USERPROFILE%) in the patterns below instead.
#
# The ESP profiles below keep flags minimal (-O2 plus arch selection);
# append what your project ships with (-DNDEBUG, -Os, -I..., ...).
# A source that pulls in framework headers (ESP-IDF's freertos/*, a
# generated sdkconfig.h, ...) additionally needs the build's -I/-D
# flags: add `compile_commands = true` (or a path) to any target to
# borrow them from the build's compile_commands.json - see README.

# --- Profile: riscv32-esp (ESP32-C3 / C6 / H2 / P4) -------------------
# All RISC-V ESP chips share one riscv32-esp-elf-gcc binary; the
# targets differ only in -march/-mabi.  `-t riscv32-esp` runs the
# whole profile without editing `default`.

[esp32c3]
cc = "$HOME/.espressif/tools/riscv32-esp-elf/esp-*/riscv32-esp-elf/bin/riscv32-esp-elf-gcc"
flags = ["-O2", "-march=rv32imc_zicsr_zifencei", "-mabi=ilp32"]

[esp32c6]
cc = "$HOME/.espressif/tools/riscv32-esp-elf/esp-*/riscv32-esp-elf/bin/riscv32-esp-elf-gcc"
flags = ["-O2", "-march=rv32imac_zicsr_zifencei", "-mabi=ilp32"]

[esp32h2]
cc = "$HOME/.espressif/tools/riscv32-esp-elf/esp-*/riscv32-esp-elf/bin/riscv32-esp-elf-gcc"
flags = ["-O2", "-march=rv32imac_zicsr_zifencei", "-mabi=ilp32"]

# ESP32-P4 is the only ESP RISC-V chip with an FPU, hence the
# hard-float ABI.
[esp32p4]
cc = "$HOME/.espressif/tools/riscv32-esp-elf/esp-*/riscv32-esp-elf/bin/riscv32-esp-elf-gcc"
flags = ["-O2", "-march=rv32imafc_zicsr_zifencei", "-mabi=ilp32f"]

# --- Profile: xtensa-esp (ESP32 / S2 / S3) ----------------------------
# The unified xtensa-esp-elf toolchain ships one gcc binary per chip.
# `-t xtensa-esp` runs the whole profile; `-t esp` runs every ESP chip.

[esp32]
cc = "$HOME/.espressif/tools/xtensa-esp-elf/esp-*/xtensa-esp-elf/bin/xtensa-esp32-elf-gcc"
flags = ["-O2", "-mlongcalls"]

[esp32s2]
cc = "$HOME/.espressif/tools/xtensa-esp-elf/esp-*/xtensa-esp-elf/bin/xtensa-esp32s2-elf-gcc"
flags = ["-O2", "-mlongcalls"]

[esp32s3]
cc = "$HOME/.espressif/tools/xtensa-esp-elf/esp-*/xtensa-esp-elf/bin/xtensa-esp32s3-elf-gcc"
flags = ["-O2", "-mlongcalls"]

# --- Profile: other embedded (STM32 / RP2350) -------------------------
# Unlike the ESP toolchains these have no single well-known install
# path: the compilers must be on PATH, or edit cc to a full path.

# Any Cortex-M STM32; adjust -mcpu to your family (cortex-m0plus,
# cortex-m3, cortex-m7, cortex-m33, ...) and add -mfloat-abi/-mfpu
# flags if your project uses the FPU.
[stm32]
cc = "arm-none-eabi-gcc"
flags = ["-O2", "-mcpu=cortex-m4", "-mthumb"]

# RP2350 Hazard3 cores in RISC-V mode; riscv64-unknown-elf-gcc is
# multilib, -march/-mabi select rv32.  Hazard3 also implements the
# Zba/Zbb/Zbs/Zbkb extensions (append to -march on gcc >= 13, as
# pico-sdk does).
[rp2350]
cc = "riscv64-unknown-elf-gcc"
flags = ["-O2", "-march=rv32imac_zicsr_zifencei", "-mabi=ilp32"]