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a test for the load-op-store scenario permitted by this PR
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llvm/test/Transforms/LoopUnroll/AArch64/apple-unrolling.ll

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@@ -165,6 +165,126 @@ exit:
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ret void
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}
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define void @load_op_store_loop(ptr %src, ptr %dst, i64 %N, i64 %scale, float %k) {
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; APPLE-LABEL: define void @load_op_store_loop(
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; APPLE-SAME: ptr [[SRC:%.*]], ptr [[DST:%.*]], i64 [[N:%.*]], i64 [[SCALE:%.*]], float [[K:%.*]]) #[[ATTR0]] {
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; APPLE-NEXT: [[ENTRY:.*]]:
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; APPLE-NEXT: [[TMP0:%.*]] = add i64 [[N]], -1
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; APPLE-NEXT: [[XTRAITER:%.*]] = and i64 [[N]], 1
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; APPLE-NEXT: [[TMP1:%.*]] = icmp ult i64 [[TMP0]], 1
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; APPLE-NEXT: br i1 [[TMP1]], label %[[EXIT_UNR_LCSSA:.*]], label %[[ENTRY_NEW:.*]]
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; APPLE: [[ENTRY_NEW]]:
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; APPLE-NEXT: [[UNROLL_ITER:%.*]] = sub i64 [[N]], [[XTRAITER]]
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; APPLE-NEXT: br label %[[LOOP:.*]]
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; APPLE: [[LOOP]]:
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; APPLE-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[ENTRY_NEW]] ], [ [[IV_NEXT_1:%.*]], %[[LOOP]] ]
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; APPLE-NEXT: [[NITER:%.*]] = phi i64 [ 0, %[[ENTRY_NEW]] ], [ [[NITER_NEXT_1:%.*]], %[[LOOP]] ]
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; APPLE-NEXT: [[SCALED_IV:%.*]] = mul nuw nsw i64 [[IV]], [[SCALE]]
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; APPLE-NEXT: [[GEP_SRC:%.*]] = getelementptr inbounds float, ptr [[SRC]], i64 [[SCALED_IV]]
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; APPLE-NEXT: [[L:%.*]] = load float, ptr [[GEP_SRC]], align 4
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; APPLE-NEXT: [[O:%.*]] = fadd float [[L]], [[K]]
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; APPLE-NEXT: [[GEP_DST:%.*]] = getelementptr inbounds float, ptr [[DST]], i64 [[IV]]
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; APPLE-NEXT: store float [[O]], ptr [[GEP_DST]], align 4
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; APPLE-NEXT: [[IV_NEXT:%.*]] = add nuw nsw i64 [[IV]], 1
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; APPLE-NEXT: [[SCALED_IV_1:%.*]] = mul nuw nsw i64 [[IV_NEXT]], [[SCALE]]
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; APPLE-NEXT: [[GEP_SRC_1:%.*]] = getelementptr inbounds float, ptr [[SRC]], i64 [[SCALED_IV_1]]
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; APPLE-NEXT: [[L_1:%.*]] = load float, ptr [[GEP_SRC_1]], align 4
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; APPLE-NEXT: [[O_1:%.*]] = fadd float [[L_1]], [[K]]
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; APPLE-NEXT: [[GEP_DST_1:%.*]] = getelementptr inbounds float, ptr [[DST]], i64 [[IV_NEXT]]
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; APPLE-NEXT: store float [[O_1]], ptr [[GEP_DST_1]], align 4
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; APPLE-NEXT: [[IV_NEXT_1]] = add nuw nsw i64 [[IV]], 2
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; APPLE-NEXT: [[NITER_NEXT_1]] = add i64 [[NITER]], 2
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; APPLE-NEXT: [[NITER_NCMP_1:%.*]] = icmp eq i64 [[NITER_NEXT_1]], [[UNROLL_ITER]]
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; APPLE-NEXT: br i1 [[NITER_NCMP_1]], label %[[EXIT_UNR_LCSSA_LOOPEXIT:.*]], label %[[LOOP]]
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; APPLE: [[EXIT_UNR_LCSSA_LOOPEXIT]]:
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; APPLE-NEXT: [[IV_UNR_PH:%.*]] = phi i64 [ [[IV_NEXT_1]], %[[LOOP]] ]
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; APPLE-NEXT: br label %[[EXIT_UNR_LCSSA]]
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; APPLE: [[EXIT_UNR_LCSSA]]:
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; APPLE-NEXT: [[IV_UNR:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[IV_UNR_PH]], %[[EXIT_UNR_LCSSA_LOOPEXIT]] ]
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; APPLE-NEXT: [[LCMP_MOD:%.*]] = icmp ne i64 [[XTRAITER]], 0
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; APPLE-NEXT: br i1 [[LCMP_MOD]], label %[[LOOP_EPIL_PREHEADER:.*]], label %[[EXIT:.*]]
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; APPLE: [[LOOP_EPIL_PREHEADER]]:
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; APPLE-NEXT: br label %[[LOOP_EPIL:.*]]
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; APPLE: [[LOOP_EPIL]]:
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; APPLE-NEXT: [[SCALED_IV_EPIL:%.*]] = mul nuw nsw i64 [[IV_UNR]], [[SCALE]]
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; APPLE-NEXT: [[GEP_SRC_EPIL:%.*]] = getelementptr inbounds float, ptr [[SRC]], i64 [[SCALED_IV_EPIL]]
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; APPLE-NEXT: [[L_EPIL:%.*]] = load float, ptr [[GEP_SRC_EPIL]], align 4
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; APPLE-NEXT: [[O_EPIL:%.*]] = fadd float [[L_EPIL]], [[K]]
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; APPLE-NEXT: [[GEP_DST_EPIL:%.*]] = getelementptr inbounds float, ptr [[DST]], i64 [[IV_UNR]]
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; APPLE-NEXT: store float [[O_EPIL]], ptr [[GEP_DST_EPIL]], align 4
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; APPLE-NEXT: br label %[[EXIT]]
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; APPLE: [[EXIT]]:
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; APPLE-NEXT: ret void
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;
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; OTHER-LABEL: define void @load_op_store_loop(
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; OTHER-SAME: ptr [[SRC:%.*]], ptr [[DST:%.*]], i64 [[N:%.*]], i64 [[SCALE:%.*]], float [[K:%.*]]) #[[ATTR0]] {
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; OTHER-NEXT: [[ENTRY:.*]]:
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; OTHER-NEXT: [[TMP0:%.*]] = add i64 [[N]], -1
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; OTHER-NEXT: [[XTRAITER:%.*]] = and i64 [[N]], 1
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; OTHER-NEXT: [[TMP1:%.*]] = icmp ult i64 [[TMP0]], 1
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; OTHER-NEXT: br i1 [[TMP1]], label %[[EXIT_UNR_LCSSA:.*]], label %[[ENTRY_NEW:.*]]
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; OTHER: [[ENTRY_NEW]]:
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; OTHER-NEXT: [[UNROLL_ITER:%.*]] = sub i64 [[N]], [[XTRAITER]]
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; OTHER-NEXT: br label %[[LOOP:.*]]
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; OTHER: [[LOOP]]:
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; OTHER-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[ENTRY_NEW]] ], [ [[IV_NEXT_1:%.*]], %[[LOOP]] ]
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; OTHER-NEXT: [[NITER:%.*]] = phi i64 [ 0, %[[ENTRY_NEW]] ], [ [[NITER_NEXT_1:%.*]], %[[LOOP]] ]
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; OTHER-NEXT: [[SCALED_IV:%.*]] = mul nuw nsw i64 [[IV]], [[SCALE]]
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; OTHER-NEXT: [[GEP_SRC:%.*]] = getelementptr inbounds float, ptr [[SRC]], i64 [[SCALED_IV]]
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; OTHER-NEXT: [[L:%.*]] = load float, ptr [[GEP_SRC]], align 4
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; OTHER-NEXT: [[O:%.*]] = fadd float [[L]], [[K]]
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; OTHER-NEXT: [[GEP_DST:%.*]] = getelementptr inbounds float, ptr [[DST]], i64 [[IV]]
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; OTHER-NEXT: store float [[O]], ptr [[GEP_DST]], align 4
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; OTHER-NEXT: [[IV_NEXT:%.*]] = add nuw nsw i64 [[IV]], 1
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; OTHER-NEXT: [[SCALED_IV_1:%.*]] = mul nuw nsw i64 [[IV_NEXT]], [[SCALE]]
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; OTHER-NEXT: [[GEP_SRC_1:%.*]] = getelementptr inbounds float, ptr [[SRC]], i64 [[SCALED_IV_1]]
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; OTHER-NEXT: [[L_1:%.*]] = load float, ptr [[GEP_SRC_1]], align 4
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; OTHER-NEXT: [[O_1:%.*]] = fadd float [[L_1]], [[K]]
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; OTHER-NEXT: [[GEP_DST_1:%.*]] = getelementptr inbounds float, ptr [[DST]], i64 [[IV_NEXT]]
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; OTHER-NEXT: store float [[O_1]], ptr [[GEP_DST_1]], align 4
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; OTHER-NEXT: [[IV_NEXT_1]] = add nuw nsw i64 [[IV]], 2
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; OTHER-NEXT: [[NITER_NEXT_1]] = add i64 [[NITER]], 2
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; OTHER-NEXT: [[NITER_NCMP_1:%.*]] = icmp eq i64 [[NITER_NEXT_1]], [[UNROLL_ITER]]
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; OTHER-NEXT: br i1 [[NITER_NCMP_1]], label %[[EXIT_UNR_LCSSA_LOOPEXIT:.*]], label %[[LOOP]]
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; OTHER: [[EXIT_UNR_LCSSA_LOOPEXIT]]:
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; OTHER-NEXT: [[IV_UNR_PH:%.*]] = phi i64 [ [[IV_NEXT_1]], %[[LOOP]] ]
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; OTHER-NEXT: br label %[[EXIT_UNR_LCSSA]]
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; OTHER: [[EXIT_UNR_LCSSA]]:
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; OTHER-NEXT: [[IV_UNR:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[IV_UNR_PH]], %[[EXIT_UNR_LCSSA_LOOPEXIT]] ]
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; OTHER-NEXT: [[LCMP_MOD:%.*]] = icmp ne i64 [[XTRAITER]], 0
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; OTHER-NEXT: br i1 [[LCMP_MOD]], label %[[LOOP_EPIL_PREHEADER:.*]], label %[[EXIT:.*]]
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; OTHER: [[LOOP_EPIL_PREHEADER]]:
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; OTHER-NEXT: br label %[[LOOP_EPIL:.*]]
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; OTHER: [[LOOP_EPIL]]:
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; OTHER-NEXT: [[SCALED_IV_EPIL:%.*]] = mul nuw nsw i64 [[IV_UNR]], [[SCALE]]
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; OTHER-NEXT: [[GEP_SRC_EPIL:%.*]] = getelementptr inbounds float, ptr [[SRC]], i64 [[SCALED_IV_EPIL]]
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; OTHER-NEXT: [[L_EPIL:%.*]] = load float, ptr [[GEP_SRC_EPIL]], align 4
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; OTHER-NEXT: [[O_EPIL:%.*]] = fadd float [[L_EPIL]], [[K]]
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; OTHER-NEXT: [[GEP_DST_EPIL:%.*]] = getelementptr inbounds float, ptr [[DST]], i64 [[IV_UNR]]
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; OTHER-NEXT: store float [[O_EPIL]], ptr [[GEP_DST_EPIL]], align 4
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; OTHER-NEXT: br label %[[EXIT]]
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; OTHER: [[EXIT]]:
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; OTHER-NEXT: ret void
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;
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entry:
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br label %loop
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loop:
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%iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
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%scaled.iv = mul nuw nsw i64 %iv, %scale
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%gep.src = getelementptr inbounds float, ptr %src, i64 %scaled.iv
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%l = load float, ptr %gep.src, align 4
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%o = fadd float %l, %k
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%gep.dst = getelementptr inbounds float, ptr %dst, i64 %iv
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store float %o, ptr %gep.dst, align 4
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%iv.next = add nuw nsw i64 %iv, 1
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%ec = icmp eq i64 %iv.next, %N
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br i1 %ec, label %exit, label %loop
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exit:
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ret void
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}
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@A = external constant [9 x i8], align 1
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@B = external constant [8 x i32], align 4
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@C = external constant [8 x i32], align 4

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