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The register file the eRoT serves to the Recovery Agent, and the dispatch that answers one access: reads serve register bytes, refused writes latch the protocol error into DEVICE_STATUS byte 1, and INDIRECT_FIFO_DATA payloads drain into a FifoSink. The DEVICE_STATUS read is the one place the clear-on-read of the protocol error happens. Policy stays with the caller: an accepted RECOVERY_CTRL or DEVICE_RESET write only lands in the register, and the runtime finds it through take_activation and take_reset_request, which clear the field per the "Write 1, Device Clears" contract. RamStaging backs the FIFO in tests and mirrors the ImageSource shape (len, read_at) without depending on the orchestrator driver; the trait impl lands in an orchestrator adapter at composition, the way the pldm adapter binds FdEvent. The crate is host-testable with no kernel deps, the services/i2c/server half of the pattern. The register file instance will live in the i2c server-runtime loop, which is the only place that can answer an SMBus read before the clock-stretch budget runs out. Signed-off-by: Christina Quast <christina.quast@9elements.com>
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Second of three, based on #35. One agent access in, one answer out:
dispatchtakes a command byte, an optional write payload and a response buffer, serves the register bytes and drainsINDIRECT_FIFO_DATAinto aFifoSink. A refused access latches its protocol error into DEVICE_STATUS byte 1, which the DEVICE_STATUS read clears, the one clear-on-read of the interface.The dispatch decides no policy. An accepted RECOVERY_CTRL or DEVICE_RESET write lands in the register and the runtime finds it through
take_activationandtake_reset_request, which clear the field the device acted on.The register file lives with the i2c server-runtime loop at run time, because only that loop can answer a read within the clock-stretch budget. The crate itself stays transport-free and host-testable.
Stack, review in order:
Upstream counterpart: OpenPRoT#629.