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fix(MPU): promote attr to uint32_t before shifting in ARM_MPU_SetMemAttrEx#305

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saikumar-mandaji:fix/mpu-setmemattr-shift-ub
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fix(MPU): promote attr to uint32_t before shifting in ARM_MPU_SetMemAttrEx#305
saikumar-mandaji wants to merge 1 commit into
ARM-software:mainfrom
saikumar-mandaji:fix/mpu-setmemattr-shift-ub

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Fixes #169

Problem

ARM_MPU_SetMemAttrEx computes attr << pos where attr is uint8_t. Integer promotion converts attr to a signed int before the shift is evaluated. For attr >= 0x80 and pos == 24, the mathematical result (up to 0xFF000000) exceeds INT_MAX, which is undefined behavior for a signed left shift -- not merely implementation-defined truncation.

Fix

Promote attr to uint32_t explicitly before shifting, so the shift is performed in unsigned arithmetic and cannot overflow, matching the fix suggested in the issue.

Verification

Verified by hand against the issue's analysis (integer-promotion rules for E1 << E2, and the resulting range for attr << pos at pos == 24). No C compiler was available in the environment this patch was authored in, so I was not able to build/run against the test suite directly -- please double-check against CI/local build before merging.

…ttrEx

attr is uint8_t. In `attr << pos`, integer promotion converts attr to
a signed int before the shift; for attr >= 0x80 and pos == 24 the
mathematical result (up to 0xFF000000) exceeds INT_MAX, which is
undefined behavior for a signed left shift, not merely
implementation-defined truncation.

Fix: promote attr to uint32_t explicitly before shifting, so the
shift is performed in unsigned arithmetic and cannot overflow,
matching the fix suggested in the issue.

Fixes ARM-software#169

Signed-off-by: Saikumar Mandaji <mandajisaikumar@gmail.com>
@jkrech
jkrech requested a review from JonatanAntoni July 19, 2026 15:05
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Test Results

   292 files   -    352     292 suites   - 352   0s ⏱️ - 15m 56s
    56 tests +     7      54 ✅ +   10      2 💤  -     3  0 ❌ ±0 
15 768 runs   - 15 788  13 264 ✅  - 6 892  2 504 💤  - 8 896  0 ❌ ±0 

Results for commit b418536. ± Comparison against base commit 7f62ddc.

This pull request removes 49 and adds 56 tests. Note that renamed tests count towards both.
CMSIS-Core.src ‑ apsr.c
CMSIS-Core.src ‑ basepri.c
CMSIS-Core.src ‑ bkpt.c
CMSIS-Core.src ‑ clrex.c
CMSIS-Core.src ‑ clz.c
CMSIS-Core.src ‑ control.c
CMSIS-Core.src ‑ cp15.c
CMSIS-Core.src ‑ cpsr.c
CMSIS-Core.src ‑ dmb.c
CMSIS-Core.src ‑ dsb.c
…
TC_CML1Cache_CleanDCacheByAddrWhileDisabled
TC_CML1Cache_EnDisableDCache
TC_CML1Cache_EnDisableICache
TC_CoreFunc_APSR
TC_CoreFunc_BASEPRI
TC_CoreFunc_Control
TC_CoreFunc_EnDisIRQ
TC_CoreFunc_EncDecIRQPrio
TC_CoreFunc_FAULTMASK
TC_CoreFunc_FPSCR
…
This pull request removes 5 skipped tests and adds 2 skipped tests. Note that renamed tests count towards both.
CMSIS-Core.src ‑ lda.c
CMSIS-Core.src ‑ ldaex.c
CMSIS-Core.src ‑ stl.c
CMSIS-Core.src ‑ stlex.c
CMSIS-Core.src ‑ systick.c
TC_CoreInstr_WFE
TC_CoreInstr_WFI

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Core Armv8 ARM_MPU_SetMemAttrEx include undefined behaviour

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