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Porting NDTwin to P4/BMv2
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Porting NDTwin to P4/BMv2
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Achievement: Pair ExtraordinaireAchievement: Pull Sharkx2Achievement: Quickdraw

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Achievement: Pair ExtraordinaireAchievement: Pull Sharkx2Achievement: Quickdraw

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@ndtwin-lab

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Adam010341/README.md

Hi, I'm Adam Fan

Building a network digital twin (NDTwin) · P4/BMv2 · RISC-V · FPGA

     .--.        adam@ndtwin
    |o_o |       -----------
    |:_/ |       Host       NCKU CSIE × Purdue ECE (dual degree candidate)
   //   \ \      Role       Research Assistant @ Academia Sinica NSL
  (|     | )     Focus      NDTwin, P4/BMv2 development line
 /'\_   _/`\     Languages  C · C++ · Python · P4 · Java · Verilog · MATLAB · asm
 \___)=(___/     Research   learned indexes for packet classification,
                            measurement validity in BMv2 benchmarking
                 Contact    adam010341@gmail.com

Education

  • NCKU CSIE, Junior · Purdue ECE–NCKU CSIE Dual Degree Program candidate
  • GPA 3.85/4.0
  • TOEIC 980/990

Experience

  • Summer intern, Network and System Laboratory, Academia Sinica — Jul 2026 — Sep 2026
  • Research Assistant, Network and System Laboratory, Academia Sinica — Sep 2026–
  • Undergraduate Researcher, Computer & Internet Architecture Lab, NCKU — Jul 2026–
  • Class representative, Purdue ECE–NCKU CSIE Dual Degree Program

Research

  • Learned index structures for dynamic packet classification — NCKU CIAL, advised by Prof. Yen-Kuang Chang
  • Measurement validity in BMv2 benchmarking (preprint in prep) — Independent research

NDTwin: open-source network digital twin

  • Kernel collects real-time flow states with a zero control-plane overhead sFlow scheme (IEEE ICC 2026).
  • Apps use simulation and AI/ML to test "what-if" scenarios in parallel, pick the best fix, and push it to the switches in real time.
  • Web GUI with LLM-based intent-based network management, plus a live traffic visualizer.
  • Runs on hardware switches or on Mininet. Usable for production network operation or as a research platform.

I'm adding a P4/BMv2 backend next to the existing Open vSwitch + Ryu one, behind the same kernel APIs.

Animated NDTwin architecture: NDTwin apps (traffic-engineering, energy-saving, simulation / AI-driven) talk to the NDTwin kernel, which talks REST to two interchangeable backends. In the P4 backend (my addition), the P4 proxy agent drives BMv2 simple_switch_grpc in Mininet over P4Runtime (gRPC); a packet crosses h1, s1, s2, h2, each switch lights the ndtwin_switch.p4 table it matched (flow_5tuple first, ipv4_lpm on a miss), and a 1-in-256 sampled copy goes to the proxy, which sends synthesised sFlow v5 to the kernel. In the upstream OpenFlow backend, the Ryu controller drives Open vSwitch in Mininet over OpenFlow, and OVS sends sFlow to the kernel.

Tech stack

Skills

Pinned Loading

  1. NDTwin-Kernel-P4 NDTwin-Kernel-P4 Public

    Network digital twin kernel with P4/BMv2 data-plane support, via a P4Runtime proxy behind Ryu's northbound API.

    C++ 5

  2. ndtwin-analysis ndtwin-analysis Public

    Measurement drivers, analysers and figure scripts from ten NDTwin P4/bmv2 measurement rounds.

    Python 2

  3. cache-aware-riscv-optimization cache-aware-riscv-optimization Public

    Tree-PLRU cache replacement in Spike + cache-blocked matrix transpose (-76% misses) + RVV-tiled GEMM for MLP inference.

    C

  4. fourier-comms-matlab fourier-comms-matlab Public

    Purdue × NCKU Fourier & communications projects in MATLAB: room acoustics, Fourier series, a software AM/SSB radio.

    MATLAB

  5. PIC18F4520-Assembly-Labs PIC18F4520-Assembly-Labs Public

    PIC18F4520 assembly labs (MPASM): six simulator-verified projects, up to an in-place iterative quicksort.

    Makefile

  6. rvv-mel-spectrogram rvv-mel-spectrogram Public

    Mel spectrogram (FFT, power spectrum, mel filter bank) hand-vectorised with RISC-V Vector 1.0 intrinsics.

    C 1