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T8142 (M5): match CPUs by MPIDR, reserve the second CTRR range, log stuck SMP calls - #19
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Instead of assuming the DT lists CPUs in the same order as the ADT, look up the live CPU with the node's MPIDR. Same result for in-order trees; lets a bring-up DT reorder CPUs (used to boot one specific E-core early on t8142). Assisted-By: LLM Signed-off-by: Hisham Alkhudrawi <hisham.ma.mohammed@gmail.com>
t8142 has a second CTRR instance, covering the DeviceTree/TrustCache area below the bootloader. iBoot leaves it enabled on the secondary cores, so Linux crashes when it hands those pages to a secondary CPU and writes to them, the same way it does for the first instance. The first instance is already reserved for t8142 through the apple_sysregs_unlocked feature check. Name the second instance's two registers (encodings 3, 0, 11, 0, 2/3, next to the existing pair) and reserve that range too, gated on t8142 and skipped when the instance reads back zero, so the M4 targets are untouched. Assisted-By: LLM Signed-off-by: Hisham Alkhudrawi <hisham.ma.mohammed@gmail.com>
A secondary that never takes a cross-CPU call leaves smp_call4() spinning with no output at all, which looks exactly like a dead board. Print the CPU, the call and the target state once after a second, flush the console, and then keep waiting as before, so the behaviour is unchanged apart from the message. This was written to chase a first-secondary wedge on J704 (M5) that shows up roughly one boot in three. Assisted-By: LLM Signed-off-by: Hisham Alkhudrawi <hisham.ma.mohammed@gmail.com>
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These are three small changes that the T8142 (Apple M5, Mac17,2 / J704) needs to boot Linux with all CPUs.
kboot: match DT CPU nodes to running CPUs by MPIDRkboot paired DT CPU nodes with live CPUs by position, and bailed on the first MPIDR mismatch. This change looks up the live CPU by the node's MPIDR instead.
kboot: reserve the second CTRR range on t8142T8142 has a second CTRR instance. It covers the DeviceTree/TrustCache area just below the bootloader, and iBoot leaves it enabled on the secondary cores. If Linux hands one of those pages to a secondary CPU and writes to it, the CPU faults, just as it does for the first instance.
mainalready reserves the first instance on T8142, through theapple_sysregs_unlockedcheck.3, 0, 11, 0, 2/3, next to the existing pair) and the reservation itself.How it was found: a native boot oopsed at exactly the first page of a protected range. A read-only sweep of the CTRR system registers on the boot core then gave the second instance's bounds, which cover the DeviceTree and TrustCache.
smp: log once when a call target hasn't taken a call after 1 sA secondary that never takes a cross-CPU call leaves
smp_call4()spinning silently, which looks exactly like a dead board. This change prints the CPU, the call and the target's state once after a second, flushes the console, and then keeps waiting as before. Apart from the message, behaviour is unchanged.Testing
The test machine was a J704 with iBoot mBoot-20457.41.3.
main, was chainloaded into RAM.On the M5, this series needs two other PRs:
maintakes an SError during DAPF setup on T8142, before Linux starts.Result with this series + #14 + #18:
Limits of this test:
clang-formatwas not run.Provenance
These changes come from boot failures, m1n1's own error output and live system-register reads on the machine. No Apple binary was disassembled for them, and none of them touches the components listed in my disclosure in #tainted-re.
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