TileOP: dynamic TLOAD/TSTORE dims use register-form B.DIM - #102
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September 9, 2026 11:22
Issue #63 column remainder. ASL SelectedBundleComparisonShapeMatches requires the B.DIM LB1 to equal the source valid rows, but TCOLSUM/MAX/MIN/PROD/ARGMAX/ARGMIN still bound destination dims in all SS/SD/DS/DD branches: destination ValidRow=1 was encoded into LB1, so a multi-row source silently reduced only row 0. Mirror the PR #69 row-reduction fix on the source side across the six column operations: static branches use tile_shape_in dims, dynamic branches use src.GetValidCol()/GetValidRow(), and the branch guards key on the source dims. Destination static_asserts (1 x N, source column geometry) stay. Docs: state the source-geometry B.DIM rule on the six column operation pages (PR #69 did not update row docs; column pages now lead).
Issue #100. When a tile's ValidRow/ValidCol is DYNAMIC, GetValidRow()/ GetValidCol() are runtime values, but the plain TLOAD/TSTORE paths and both Shared TLOAD variants bound them to the "i" immediate constraint, so every dynamic-shape kernel failed with 'invalid operand for inline asm constraint i' (regression window 804eb03..b8669ce). Per ASL B.DIM (ADR-BLOCK-0012 Decision 013/014) a runtime dimension must come from a GPR (RegSrc 0..23, B.DIM <gpr>, 0, ->lbN); only static dims use the immediate/compressed form. Add per-dimension SS/SD/DS/DD dispatch (mirroring the existing TLOAD_CUBE pattern) to: - TLOAD plain path (Local destination) - TSTORE plain path (Local source) - Shared TLOAD (both the returning and void variants) The B.ASSEMBLE/B.SUBVIEW range-modifier emitters inside TLOAD/TSTORE still bind runtime dims to "i"; that region is part of the in-progress TPARTVIEW/TASSEMBLY work (LLVM #74) and is left for a follow-up. Docs: TLOAD/TSTORE pages now state the dynamic-dim register-form rule.
This was referenced Sep 9, 2026
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Closes #100 (primary paths; range-modifier remainder tracked below).
Problem
When a tile's
ValidRow/ValidColisDYNAMIC,GetValidRow()/GetValidCol()read runtime state, but the plainTLOAD/TSTOREpaths and bothShared TLOADvariants bound them to the"i"immediate constraint — every dynamic-shape kernel failed withinvalid operand for inline asm constraint 'i'(regression window804eb03..b8669ce, main suspect67d47ab#82).ISA basis
ASL
B.DIM(asl/block/attributes/B.DIM.asl, ADR-BLOCK-0012 Decision 013/014):RegSrcnames absolute GPR codes 0..23; the LB is written fromGPR[RegSrc] + uimm17. A runtime dimension must therefore useB.DIM <gpr>, 0, ->lbN; only static dims may use the immediate/compressedC.B.DIMIform.Fix
Per-dimension SS/SD/DS/DD dispatch (mirroring the existing
TLOAD_CUBEpattern) added to:TLOAD(Local destination)TSTORE(Local source)TLOAD(returning and void variants)Static dims keep the immediate form unchanged; dynamic dims bind
"r"and emitB.DIM %[VROW], 0, ->lb1etc.Verification
-O2 -mlxbc -fenable-matrix), physical 32x32 with all four valid-shape combos:C.B.DIMI 32/32/32✓C.B.DIMI 32/32/32✓C.B.DIMI 32+B.DIM a1,0,->lb1✓B.DIM a1,0,->lb0+C.B.DIMI 32✓B.DIM a0,0+B.DIM a2,0✓constraint 'i'failure);__vec__kernel form / dynamic reduction destinations — verified by compiling on unmodifiedlinx);test_v058_engine_contract: 40/40 pass (incl. docs freshness);Remaining (not in scope of the 5 failing kernels)
The
B.ASSEMBLE/B.SUBVIEWrange-modifier emitters inside TLOAD/TSTORE still bind runtime dims to"i". That region is part of the in-progress TPARTVIEW/TASSEMBLY work (LLVM #74, see CODEX_HANDOFF) and needs the same per-dim dispatch as a follow-up. The five official kernels in the report (rms_norm & family) go through the plain TLOAD/TSTORE paths fixed here.