[OMNIML-4930] specdec_bench cell t1_d7 — Qwen/Qwen3.5-4B / MTP / vllm#1619
[OMNIML-4930] specdec_bench cell t1_d7 — Qwen/Qwen3.5-4B / MTP / vllm#1619ChenhanYu wants to merge 1 commit into
Conversation
|
Important Review skippedDraft detected. Please check the settings in the CodeRabbit UI or the ⚙️ Run configurationConfiguration used: Path: .coderabbit.yaml Review profile: CHILL Plan: Enterprise Run ID: You can disable this status message by setting the Use the checkbox below for a quick retry:
✨ Finishing Touches🧪 Generate unit tests (beta)
Comment |
Codecov Report✅ All modified and coverable lines are covered by tests. Additional details and impacted files@@ Coverage Diff @@
## main #1619 +/- ##
==========================================
- Coverage 76.88% 75.44% -1.44%
==========================================
Files 478 482 +4
Lines 52209 55600 +3391
==========================================
+ Hits 40140 41949 +1809
- Misses 12069 13651 +1582
Flags with carried forward coverage won't be shown. Click here to find out more. ☔ View full report in Codecov by Sentry. 🚀 New features to boost your workflow:
|
Signed-off-by: chenhany <chenhany@nvidia.com>
415f780 to
9aa0c7c
Compare
Summary\n- add SPEED specdec_bench cell t1_d7 for Qwen3.5-4B MTP vLLM\n- add per-cell runtime params for t=1 d=7\n\n## Testing\n- not run (yaml-only change)