Issues

• [Bug Report]NutShell Vulnerability Report: RS Capacity Gating Swarm Side Channel

  OSCPU/NutShell#296 · Filter by author XJCGTL opened on Nov 3, 2026

• [Bug Report]NutShell Vulnerability Report: MSHR Merge/Spread Capacity Side Channel

  OSCPU/NutShell#295 · Filter by author XJCGTL opened on Nov 3, 2026

• [Bug Report] NutShell Vulnerability Report: MDU Divider Transient Port-Occupancy Side Channel

  OSCPU/NutShell#294 · Filter by author XJCGTL opened on Nov 3, 2026

• [Bug Report] NutShell Vulnerability Report: Blocking DCache Cross-Squash Residual-Miss Side Channel

  OSCPU/NutShell#293 · Filter by author XJCGTL opened on Nov 3, 2026

• [Bug] U-mode SRET is executed instead of raising an illegal-instruction exception

  OSCPU/NutShell#292 · Filter by author skye1577 opened on Nov 2, 2026
  1

• [Bug] U-mode SFENCE.VMA flushes the TLB instead of raising an illegal-instruction exception

  OSCPU/NutShell#291 · Filter by author skye1577 opened on Nov 2, 2026
  1

• [BUG] An illegal U-mode satp read redirects fetch to PC+4 and ends in an M-mode ecall instead of the trap vector

  OSCPU/NutShell#290 · Filter by author skye1577 opened on Nov 2, 2026
  1

• [BUG] A 16-bit all-zero instruction is decoded as C.ADDI4SPN instead of raising an illegal-instruction exception

  OSCPU/NutShell#289 · Filter by author skye1577 opened on Nov 2, 2026
  1

• [misa] Clearing U does not clear dependent S

  OSCPU/NutShell#276 · Filter by author kkapapu opened on Sep 5, 2026

• [mip] MTIP/MEIP is software-writable via CSR write, which is read-only

  OSCPU/NutShell#275 · Filter by author kkapapu opened on Sep 5, 2026

• [mie] USIE/UTIE/UEIE are writable although N is not implemented

  OSCPU/NutShell#272 · Filter by author kkapapu opened on Aug 29, 2026

• [amoxor.w] rd gets the AMO result instead of the original memory value

  OSCPU/NutShell#271 · Filter by author kkapapu opened on Aug 29, 2026

• Accessing pmpcfg1 on RV64 is not an illegal instruction

  OSCPU/NutShell#270 · Filter by author kkapapu opened on Aug 29, 2026

• S-mode mret is executed instead of illegal-instruction

  OSCPU/NutShell#269 · Filter by author kkapapu opened on Aug 29, 2026

• [Sv39] Misaligned superpage (nonzero low PPN) does not raise a page fault

  OSCPU/NutShell#268 · Filter by author kkapapu opened on Aug 29, 2026

• Final-level Sv39 PTE with W=1,R=0 is accepted for store instead of raising store page fault

  OSCPU/NutShell#266 · Filter by author jf-cc727 opened on Jun 23, 2026
  1

• Misaligned Sv39 1 GiB superpage leaf is accepted instead of raising load page fault

  OSCPU/NutShell#265 · Filter by author jf-cc727 opened on Jun 23, 2026
  1

• PTW PTE-access faults are misreported as load page faults

  OSCPU/NutShell#264 · Filter by author jf-cc727 opened on Jun 23, 2026
  1

• csrr minstret exposes a one-instruction-stale retired count

  OSCPU/NutShell#263 · Filter by author jf-cc727 opened on Jun 23, 2026
  1

• Sv39-translated U-mode store to an inaccessible physical address retires without Store/AMO access fault

  OSCPU/NutShell#262 · Filter by author jf-cc727 opened on Jun 23, 2026
  1

• mtvec readback retains upper BASE bits that are silently truncated on trap entry

  OSCPU/NutShell#261 · Filter by author jf-cc727 opened on Jun 23, 2026
  1

• Explicit writes to minstret lose to the automatic retirement update

  OSCPU/NutShell#260 · Filter by author jf-cc727 opened on Jun 23, 2026
  1

• Missing documentation for NOOP_HOME environment variable

  OSCPU/NutShell#256 · Filter by author zlh20040308 opened on Jan 6, 2026
  2

• TSR=1, SRET executed in S-mode does not raise an exception

  OSCPU/NutShell#254 · Filter by author fly-1011 opened on Dec 11, 2025

• TVM=1, SFENCE.VMA in S-mode does not raise an exception

  OSCPU/NutShell#253 · Filter by author fly-1011 opened on Dec 11, 2025
  1