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feat(boom): add the 2 GiB FPGA DTS and gcc16 Zba/Zbb/Zbs SPEC2006 config - #82
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good-circle wants to merge 6 commits into
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BOOM Medium with 2 GiB DRAM uses a Rocket-style map: CLINT at 0x02000000, PLIC at 0x0c000000 (31 devices), and an NS16550 at 0x10000000. Advertise rv64imafdc_zba_zbb_zbs plus Zicsr and Zifencei so the firmware matches that core. Select it with DEFAULT_DTB=boom-mem2g. Linux still uses xiangshan_defconfig; only the device tree changes.
The default RVA23 SPEC2006 cfg emits Zbc and V. This BOOM profile does not implement either. Keep the gcc16 base options and compile both base and peak with -march=rv64gc_zba_zbb_zbs. Pass it with SPEC2006_CFG=workloads/linux/spec2006/configs/gcc16-linux-riscv64-rv64gc_zba_zbb_zbs.cfg.
klin02
self-requested a review
October 26, 2026 15:17
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see #83 |
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Summary
Add the BOOM workload-side pieces for the NutShell-style emu/FPGA split:
boom-mem2g: emu profile,SimAXIUartat0x10000000;boom-fpga-mem2g: FPGA profile, board UART16550 at0x310b0000,reg-shift=2,clock-frequency=50MHz;rv64gc_zba_zbb_zbs.Commits
feat(dts): add the boom-mem2g board profilefeat(spec2006): add a gcc16 cfg for rv64gc_zba_zbb_zbsfeat(dts): add the BOOM FPGA UART16550 profileValidation
linux/hello DEFAULT_DTB=boom-fpga-mem2gbuilds successfully withserial0: serial@310b0000,reg-shift=2, andearlycon=uart8250,mmio,0x310b0000.boom-mem2gprofile keeps the existing0x10000000UART.Notes
S00_AXI; the boardalready has
axi_uart16550at0x310b0000.