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feat(boom): add the 2 GiB FPGA DTS and gcc16 Zba/Zbb/Zbs SPEC2006 config - #82

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good-circle wants to merge 6 commits into
OpenXiangShan:mainfrom
good-circle:boom-mem2g-profile
Closed

good-circle wants to merge 6 commits into
OpenXiangShan:mainfrom
good-circle:boom-mem2g-profile

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@good-circle

@good-circle good-circle commented Oct 24, 2026 •

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Summary

Add the BOOM workload-side pieces for the NutShell-style emu/FPGA split:

  • boom-mem2g: emu profile, SimAXIUart at 0x10000000;
  • boom-fpga-mem2g: FPGA profile, board UART16550 at 0x310b0000,
    reg-shift=2, clock-frequency=50MHz;
  • gcc16 SPEC2006 config for rv64gc_zba_zbb_zbs.

Commits

  • feat(dts): add the boom-mem2g board profile
  • feat(spec2006): add a gcc16 cfg for rv64gc_zba_zbb_zbs
  • feat(dts): add the BOOM FPGA UART16550 profile

Validation

  • Both DTS profiles generate and compile.
  • linux/hello DEFAULT_DTB=boom-fpga-mem2g builds successfully with
    serial0: serial@310b0000, reg-shift=2, and
    earlycon=uart8250,mmio,0x310b0000.
  • The emu boom-mem2g profile keeps the existing 0x10000000 UART.

Notes

  • The FPGA board wrapper must expose BOOM MMIO AXI to S00_AXI; the board
    already has axi_uart16550 at 0x310b0000.

good-circle and others added 6 commits September 24, 2026 12:09
BOOM Medium with 2 GiB DRAM uses a Rocket-style map: CLINT at
0x02000000, PLIC at 0x0c000000 (31 devices), and an NS16550 at
0x10000000. Advertise rv64imafdc_zba_zbb_zbs plus Zicsr and Zifencei
so the firmware matches that core.

Select it with DEFAULT_DTB=boom-mem2g. Linux still uses
xiangshan_defconfig; only the device tree changes.
The default RVA23 SPEC2006 cfg emits Zbc and V. This BOOM profile
does not implement either. Keep the gcc16 base options and compile
both base and peak with -march=rv64gc_zba_zbb_zbs.

Pass it with SPEC2006_CFG=workloads/linux/spec2006/configs/gcc16-linux-riscv64-rv64gc_zba_zbb_zbs.cfg.
@klin02
klin02 self-requested a review October 26, 2026 15:17
@good-circle

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see #83

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2 participants