[gfx950][FlyDSL] Add dense BF16 x MXFP4 GEMM - #4772
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Fuse MXFP4 weight decode with BF16 MFMA so emulation preserves Quark activation semantics without caching a full BF16 weight.
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Pipeline A/B loads with MFMA, cover production K3 shapes with measured tile configurations, and shorten split-K B-fragment lifetimes to improve decode occupancy without regressing prefill. Signed-off-by: Liuyinfeng01 <yinfeliu@amd.com>
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Summary
Add a gfx950 FlyDSL dense GEMM for BF16 activations and packed MXFP4 weights.
This fused weight-dequant + BF16 GEMM path preserves emulation semantics. Direct A4W4 is intentionally out of scope and will be proposed separately.
Design and scope
The K loop double-buffers A in LDS. Prefill issues the next A/B tile before MFMA to preserve software-pipeline overlap. Split-K decode issues the next tile after MFMA, keeping one B tile live at a time and raising compiled occupancy for the 8448 x 7168 decode kernel from 1 to 2 waves/EU. The measured 1536 x 7168 decode configuration avoids split-K and its LDS reduction.
(N,K)=(7168,4224)projection remains on the designed fallbackPacked weights plus scales use 73.44% less storage than cached BF16 weights. Warmed launches with preallocated output add zero bytes of peak PyTorch allocation.
Kernel-level correctness
Reference: canonical MXFP4 weight decode to BF16 followed by BF16
F.linearon the original activation. Measurements use deterministic random packed weights, E8M0 scale0x7f, and M=128.The existing Triton path requantizes arbitrary BF16 activations to MXFP4, while this kernel preserves BF16 activation semantics. When activations already lie on the MXFP4 grid, all paths are exactly equal to the reference.
Kernel performance
Environment: MI355X (gfx950), PyTorch
2.11.0+gitd0c8b1f, HIP7.2.53211, FlyDSL0.3.0. Weight preparation and JIT compilation are excluded.Versus the existing dynamic-MXFP4 Triton path
This PR is 1.75x-4.86x faster than the faster existing AITER Triton path across the measured Kimi-K3 TP2 shapes.
Validation
27 passed:op_tests/flydsl_tests/test_flydsl_gemm_a16wfp4.pyF.linearpy_compile, andgit diff --checkKimi-K3 model-level validation
A three-way full GSM8K evaluation separates this fused kernel from the two non-fused emulation paths.
Setup
amd/Kimi-K3-Quark-MXFP4-AttnFP8, snapshot7544f63f99ddf3729fdc01fcdfa7f1c6aaf66ac820260813, max output 512max_num_seqs=32,max_num_batched_tokens=8192VLLM_MXFP4_EMULATION_DEQUANT_AT_LOAD=0)F.linearAccuracy
The first-pass harness used a raw substring check for
nan, incorrectly flagging 15 otherwise-correct answers containing words such asfinancial. The table recognizes only standalone NaN/Inf tokens; all three runs had the same 15 false-positive indices and no true NaN/Inf output.The fused route was selected consistently on all eight ranks for
(N,K)=(8448,7168),(1536,7168), and(7168,768). The unaligned(7168,4224)projection used cached-BF16 fallback. This covers 185/186 dense/shared linear modules and 278/279 source weight tensors.The five-answer difference between fused and cached is small and not statistically significant; it should not be interpreted as an accuracy improvement. This run shows no model-level accuracy regression from the fused path.
End-to-end serving performance
The full GSM8K run has variable output lengths. A separate fixed-token benchmark provides the controlled latency comparison.
Full GSM8K throughput
This is an end-to-end workload observation, not a fixed-output microbenchmark. Different generated reasoning lengths and batching schedules affect wall time.
Fixed-token decode
The controlled benchmark uses concurrency 1, one warmup, five measured requests, a fixed 457-token prompt, 512 generated tokens, temperature 0, and seed
20260813on the same TP8/EP8 stack.The packed per-call path was not included in this fixed-token run. Historical measurements on an older runtime showed why caching is needed (
402.43 msto90.97 msconcurrency-1 TPOT), but those numbers are not directly comparable to the current stack.This model-level experiment does not claim an end-to-end speedup over cached BF16 emulation. The kernel-level speedup above is against the existing dynamic-MXFP4 Triton path. At model level, shape mix, activation QDQ, dispatch, and fallback overhead determine the result. The demonstrated model-level benefit is retaining packed weights without a persistent full BF16 weight cache while preserving accuracy.