I work on GPU inference, kernels and compilers in Vancouver. I built FindTensor, an experimental compiler and runtime, and previously researched GPU architecture with Tor Aamodt at UBC. I'm looking for a full-time engineering role.
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- CAIRN: experimental CPU/GPU language and compiler, with ownership checks and kernel validation. Its first GH200 run turned up an NVVM 7.0.1 loop-exit miscompile, reduced to 8 lines with a workaround in #164.
- The Work a Verifier Needs: SGLang inference optimizations and int8 output-head screening, measured on GH200. In DFlash speculative decoding of Qwen3.5-4B, verifying draft blocks without per-position state snapshots, narrowing the verify tiles and enabling FlashAttention 4 raised per-request output 8.4–9.3% at 1–4 concurrent requests and throughput 12.4–13.7% at 8–32, over tuned stock SGLang.
- B200 kernels: official NVIDIA SOL-ExecBench v1.1 evaluations, with geometric-mean speedups over NVIDIA's agent-optimized scoring baseline of 2.94× on Hyena convolution/gating, 2.52× on linear/GELU/GRN/linear, 1.52× on QKV projection/GQA reshape and 1.27× on FP8 gate/up projection.
- Command A+ benchmarks: on two H100s, giving the KV cache the memory vLLM left unused raised KV capacity 1.79× and end-to-end output throughput 4–34% at each context's largest batch (25–82% in steady-state decode), on random-token workloads.
- FlashInfer: merged CUDA-graph MoE padding fix, shipped in v0.7.1 and extended by NVIDIA in #5977; dispatch diagnostics and configuration API incorporated with co-author credit; FP8 calibration bug reported and reproduced, credited in the fix.
- NVIDIA CCCL / CUB: merged execution-environment support for merge sort, merge and batched memcpy.
- Accel-Sim: merged Ubuntu 24.04 / CUDA 13.1 container update.
More projects
- KernelIndex: GPU benchmark search with source provenance.
- H100 serving estimator: GPU-time estimates from 91 runs, with held-out evaluation.
- SmolLM2 CPU checks and tensor parallel reference: numerical conformance and fault containment.
- GPU MODE PMPP practice boards, ranks as of Oct 16, 2026: H100 prefix sum 2nd of 27 (1st from Sep 2 to 30), histogram 3rd of 27, matrix multiplication 6th of 38 and convolution 6th of 31; B200 vector addition 4th of 63 and grayscale conversion 3rd of 43.
Research manuscripts and proofs
Independent preprints and manuscripts, with supporting code and selected Lean proofs.
- Attention: exact attention I/O bounds, near-linear attention in 3D, reachable-state certificates and exact neural sampling.
- Learning: SQ learning and dimension complexity, bounded-time logistic SGD and low-logit-rank distributions.
- Inference: certified int8 output heads.
- Privacy: adaptive shuffled Gaussian accounting.
- Physics: memory return, mechanical mediation, information tasks and Bell bounds and constructor entropy.
- Lean: Erdős problems.
Other contributions and proposals
Open pull requests:
- FlashInfer and CUB / Thrust.
- SGLang: verification, planning and serving fixes.
- GPU MODE QR benchmark checks, torchcomms extension packaging and Accel-Sim application compatibility.
Closed without merge: Triton FP8 dot product and GPGPU-Sim CUDA 13.