Skip to content

Reduce SPI and UART speeds for EMI hardening#26

Merged
TheAngryRaven merged 1 commit intomasterfrom
optimization_tweaks_askjda78
Mar 10, 2026
Merged

Reduce SPI and UART speeds for EMI hardening#26
TheAngryRaven merged 1 commit intomasterfrom
optimization_tweaks_askjda78

Conversation

@TheAngryRaven
Copy link
Owner

@TheAngryRaven TheAngryRaven commented Mar 7, 2026

Summary

  • GPS UART baud rate reduced from 115200 to 57600 (doubles bit width for noise margin, still 43% utilization at 25 Hz PVT)
  • SD SPI clock reduced from 4 MHz to 1 MHz (50x headroom for logging at 2.6 KB/s, 5x for BLE transfers at ~10 KB/s)
  • Updated debug log strings to reflect new baud rate

Test plan

  • Verify GPS initializes and locks at 57600 baud
  • Confirm 25 Hz PVT data rate is maintained
  • Run a logging session and verify CSV data integrity
  • Test BLE file transfer speed (should be unchanged — BLE is the bottleneck)
  • Track day field test for EMI resilience

🤖 Generated with Claude Code

@TheAngryRaven @claude
Reduce SPI and UART speeds for better EMI hardening
c0d7981 
GPS UART: 115200 → 57600 baud (43% utilization at 25 Hz PVT, doubles bit width)
SD SPI: 4 MHz → 1 MHz (still 50x headroom for logging, 5x for BLE transfers)

Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
@TheAngryRaven TheAngryRaven merged commit aea8ac5 into master Mar 10, 2026
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Reviewers

No reviews

Assignees

No one assigned

Labels

None yet

Projects

None yet

Milestone

No milestone

Development

Successfully merging this pull request may close these issues.

1 participant

@TheAngryRaven