(WIP) Add support for MCX-A156 chip

examples/nxp/mcx/build.zig

@@ -15,7 +15,10 @@ pub fn build(b: *std.Build) void {
     const frdm_mcxa153 = mb.ports.mcx.chips.mcxa153;
     const frdm_mcxn947 = mb.ports.mcx.chips.mcxn947;
 
+    const frdm_mcxa156 = mb.ports.mcx.boards.frdm_mcxa156;
+
     const available_examples = [_]Example{
+        .{ .name = "mcxa156_blinky", .target = frdm_mcxa156, .file = "src/mcxa156/blinky.zig" },
         .{ .name = "mcxa153_blinky", .target = frdm_mcxa153, .file = "src/mcxa153_blinky.zig" },
         .{ .name = "mcxn947_blinky", .target = frdm_mcxn947, .file = "src/mcxn947_blinky.zig" },
         .{ .name = "gpio_input", .target = frdm_mcxa153, .file = "src/gpio_input.zig" },

examples/nxp/mcx/src/mcxa156/blinky.zig

@@ -0,0 +1,23 @@
+const std = @import("std");
+const microzig = @import("microzig");
+const hal = microzig.hal;
+const board = microzig.board;
+
+const time = hal.time;
+
+pub const std_options = microzig.std_options(.{});
+
+comptime {
+    _ = microzig.export_startup();
+}
+
+pub fn main() !void {
+    board.Digital_RGB_Led.init();
+
+    while (true) {
+        for (0..7) |rgb| {
+            board.Digital_RGB_Led.set_color(@fromBackingInt(@intCast(rgb)));
+            time.sleep_ms(1000);
+        }
+    }
+}

examples/nxp/mcx/src/mcxa156/mcxa156.zig

@@ -0,0 +1,24 @@
+pub const std_options = microzig.std_options(.{});
+
+const microzig = @import("microzig");
+const std = @import("std");
+const hal = microzig.hal;
+const Port = hal.port.Port;
+const clkout = hal.clkout;
+
+const PORT4: Port = @fromBackingInt(@intCast(4));
+
+comptime {
+    _ = microzig.export_startup();
+}
+
+pub fn main() !void {
+    PORT4.init();
+    PORT4.configure_pin(2, .{ .MUX = 1 });
+    clkout.enable(.SLOW_CLK, 0);
+    try hal.syscon.clock_init(.{
+        .frohf = .{ .freq = .@"96Mhz", .fro_hf_div = 1 },
+        .ahb_div = 4,
+    });
+    while (true) {}
+}

port/nxp/mcx/build.zig

@@ -4,12 +4,27 @@ const microzig = @import("microzig/build-internals");
 const Self = @This();
 
 chips: struct {
+    //MCX-A 153/152/143/142/132/133
     mcxa153: *const microzig.Target,
+
+    //MCX-A 154/155/156/144/145/146
+    //mcxa144: *const microzig.Target, TODO
+    //mcxa145: *const microzig.Target, TODO
+    //mcxa146: *const microzig.Target, TODO
+    mcxa154: *const microzig.Target,
+    mcxa155: *const microzig.Target,
+    mcxa156: *const microzig.Target,
+
+    //MCX-N low density
+    //mcxn256: *const microzig.Target, //TODO
+
+    //MCX-N HIGH density
     mcxn947: *const microzig.Target,
 },
 
 boards: struct {
     frdm_mcxa153: *const microzig.Target,
+    frdm_mcxa156: *const microzig.Target,
     frdm_mcxn947: *const microzig.Target,
 },
 
@@ -18,6 +33,69 @@ pub fn init(dep: *std.Build.Dependency) ?Self {
 
     const mcux_soc_svd = b.lazyDependency("mcux-soc-svd", .{}) orelse return null;
 
+    const chip_mcxa154: microzig.Target = .{
+        .dep = dep,
+        .preferred_binary_format = .elf,
+        .zig_target = .{
+            .cpu_arch = .thumb,
+            .cpu_model = .{ .explicit = &std.Target.arm.cpu.cortex_m33 },
+            .os_tag = .freestanding,
+            .abi = .eabihf,
+        },
+        .chip = .{
+            .name = "MCXA154",
+            .register_definition = .{ .svd = mcux_soc_svd.path("MCXA154/MCXA154.xml") },
+            .memory_regions = &.{
+                .{ .tag = .flash, .offset = 0x00000000, .length = 256 * 1024, .access = .rx },
+                .{ .tag = .ram, .offset = 0x20000000, .length = 64 * 1024, .access = .rw },
+                .{ .tag = .ram, .offset = 0x2001E000, .length = 8 * 1024, .access = .rw, .name = "ECC" },
+            },
+        },
+        .hal = .{ .root_source_file = b.path("src/mcxa_15x/hal.zig") },
+    };
+
+    const chip_mcxa155: microzig.Target = .{
+        .dep = dep,
+        .preferred_binary_format = .elf,
+        .zig_target = .{
+            .cpu_arch = .thumb,
+            .cpu_model = .{ .explicit = &std.Target.arm.cpu.cortex_m33 },
+            .os_tag = .freestanding,
+            .abi = .eabihf,
+        },
+        .chip = .{
+            .name = "MCXA155",
+            .register_definition = .{ .svd = mcux_soc_svd.path("MCXA155/MCXA155.xml") },
+            .memory_regions = &.{
+                .{ .tag = .flash, .offset = 0x00000000, .length = 512 * 1024, .access = .rx },
+                .{ .tag = .ram, .offset = 0x20000000, .length = 96 * 1024, .access = .rw },
+                .{ .tag = .ram, .offset = 0x2001E000, .length = 8 * 1024, .access = .rw, .name = "ECC" },
+            },
+        },
+        .hal = .{ .root_source_file = b.path("src/mcxa_15x/hal.zig") },
+    };
+
+    const chip_mcxa156: microzig.Target = .{
+        .dep = dep,
+        .preferred_binary_format = .elf,
+        .zig_target = .{
+            .cpu_arch = .thumb,
+            .cpu_model = .{ .explicit = &std.Target.arm.cpu.cortex_m33 },
+            .os_tag = .freestanding,
+            .abi = .eabi,
+        },
+        .chip = .{
+            .name = "MCXA156",
+            .register_definition = .{ .svd = mcux_soc_svd.path("MCXA156/MCXA156.xml") },
+            .memory_regions = &.{
+                .{ .tag = .flash, .offset = 0x00000000, .length = 1024 * 1024, .access = .rx },
+                .{ .tag = .ram, .offset = 0x20000000, .length = 120 * 1024, .access = .rw },
+                .{ .tag = .ram, .offset = 0x2001E000, .length = 8 * 1024, .access = .rw, .name = "ECC" },
+            },
+        },
+        .hal = .{ .root_source_file = b.path("src/mcxa_15x/hal.zig") },
+    };
+
     const chip_mcxa153: microzig.Target = .{
         .dep = dep,
         .preferred_binary_format = .elf,
@@ -63,14 +141,36 @@ pub fn init(dep: *std.Build.Dependency) ?Self {
     };
 
     return .{
-        .chips = .{ .mcxa153 = chip_mcxa153.derive(.{}), .mcxn947 = chip_mcxn947.derive(.{}) },
-        .boards = .{ .frdm_mcxa153 = chip_mcxa153.derive(.{
-            .board = .{
-                .name = "FRDM Development Board for MCX A153",
-                .url = "https://www.nxp.com/part/FRDM-MCXA153",
-                .root_source_file = b.path("src/boards/frdm_mcxa153.zig"),
-            },
-        }), .frdm_mcxn947 = chip_mcxn947.derive(.{ .board = .{ .name = "FRDM Development Board for MCX N947", .url = "https://www.nxp.com/part/FRDM-MCXN947", .root_source_file = b.path("src/boards/frdm_mcxn947.zig") } }) },
+        .chips = .{
+            .mcxa153 = chip_mcxa153.derive(.{}),
+            .mcxa154 = chip_mcxa154.derive(.{}),
+            .mcxa155 = chip_mcxa155.derive(.{}),
+            .mcxa156 = chip_mcxa156.derive(.{}),
+            .mcxn947 = chip_mcxn947.derive(.{}),
+        },
+        .boards = .{
+            .frdm_mcxa153 = chip_mcxa153.derive(.{
+                .board = .{
+                    .name = "FRDM Development Board for MCX A153",
+                    .url = "https://www.nxp.com/part/FRDM-MCXA153",
+                    .root_source_file = b.path("src/boards/frdm_mcxa153.zig"),
+                },
+            }),
+            .frdm_mcxn947 = chip_mcxn947.derive(.{
+                .board = .{
+                    .name = "FRDM Development Board for MCX N947",
+                    .url = "https://www.nxp.com/part/FRDM-MCXN947",
+                    .root_source_file = b.path("src/boards/frdm_mcxn947.zig"),
+                },
+            }),
+            .frdm_mcxa156 = chip_mcxa156.derive(.{
+                .board = .{
+                    .name = "FRDM Development Board for MCX A156",
+                    .url = "https://www.nxp.com/part/FRDM-MCXA156",
+                    .root_source_file = b.path("src/boards/frdm_mcxa156.zig"),
+                },
+            }),
+        },
     };
 }
 

port/nxp/mcx/src/boards/frdm_mcxa156.zig

@@ -0,0 +1,45 @@
+const microzig = @import("microzig");
+const hal = microzig.hal;
+//TODO: expose RGB Led pins as PWM
+
+const Color = enum(u3) {
+    // RGB LED is active-low
+    off = 0b111,
+    blue = 0b110,
+    green = 0b101,
+    cyan = 0b100,
+    red = 0b011,
+    magenta = 0b010,
+    yellow = 0b001,
+    white = 0b000,
+};
+
+const RGB_Pin = packed struct(u3) {
+    B: u1,
+    G: u1,
+    R: u1,
+};
+
+//expose the RGB led pins as GPIOs
+pub const Digital_RGB_Led = struct {
+    const port3 = hal.port.num(3);
+    const R = port3.get_gpio(12);
+    const G = port3.get_gpio(13);
+    const B = port3.get_gpio(0);
+
+    pub fn init() void {
+        port3.init();
+        R.init();
+        R.set_direction(.out);
+        G.set_direction(.out);
+        B.set_direction(.out);
+    }
+
+    pub fn set_color(c: Color) void {
+        const P: RGB_Pin = @bitCast(c);
+
+        R.put(P.R);
+        G.put(P.G);
+        B.put(P.B);
+    }
+};

port/nxp/mcx/src/mcxa_15x/hal.zig

@@ -0,0 +1,15 @@
+pub const syscon = @import("hal/syscon.zig");
+pub const clkout = @import("hal/clkout.zig");
+pub const port = @import("hal/port.zig");
+pub const gpio = @import("hal/gpio.zig");
+pub const ostime = @import("hal/ostimer.zig");
+
+pub const time = struct {
+    pub const get_time_since_boot = ostime.get_time_since_boot;
+    pub const sleep_ms = ostime.sleep_ms;
+    pub const sleep_us = ostime.sleep_us;
+};
+
+pub fn init() void {
+    ostime.init();
+}

port/nxp/mcx/src/mcxa_15x/hal/clkout.zig

@@ -0,0 +1,33 @@
+const microzig = @import("microzig");
+const syscon = @import("syscon.zig");
+const MRCC0 = microzig.chip.peripherals.MRCC0;
+
+const Clock_Source = enum(u3) {
+    FRO_12M = 0,
+    FRO_HF_DIV = 1,
+    CLK_IN = 2,
+    CLK_16K = 3,
+    SLOW_CLK = 6,
+    no_Clock = 7,
+};
+
+pub fn enable(src: Clock_Source, div: u4) void {
+    syscon.unlock_clock_configuration();
+    defer syscon.freeze_clock_configuration();
+
+    MRCC0.MRCC_CLKOUT_CLKSEL.modify_one("MUX", @fromBackingInt(@intCast(@backingInt(src))));
+
+    MRCC0.MRCC_CLKOUT_CLKDIV.write(.{
+        .DIV = div,
+        .HALT = .OFF,
+        .RESET = .OFF,
+    });
+
+    MRCC0.MRCC_CLKOUT_CLKDIV.write(.{
+        .DIV = div,
+        .HALT = .ON,
+        .RESET = .ON,
+    });
+
+    while (MRCC0.MRCC_CLKOUT_CLKDIV.read().UNSTAB == .OFF) {}
+}