Akash Kumar akash20065ray-sys

💫 Akash Kumar

AI Systems & GPU Infrastructure • Low-Level Systems • Deep Learning Runtimes

👨‍💻 About Me

I am a systems and AI infrastructure engineer focused on GPU memory architectures, high-throughput LLM serving runtimes, low-latency computer architecture, and bare-metal systems programming.

🚀 AI Systems & Deep Learning: Engineering paged memory allocators, continuous batching schedulers, and Copy-On-Write prefix caches for autoregressive transformers.
⚡ Low-Level Architecture: Bare-metal x86 firmware, bus-cycle hardware interception, and high-performance digital signal processing (DSP).
📜 Research: Author of Targeted Bus-Cycle Interception: A Low-Latency WebAssembly Bridge for 16-Bit Bare-Metal Audio Synthesis and Multi-Timbral Acoustic Resynthesis (Camera-Ready IEEE Conference Publication).
🔬 Engineering Philosophy: Building transparent, hardware-conscious systems software, measuring nanosecond-level empirical telemetry, and crafting rich observability interfaces.

🌟 Featured Flagship Projects

⚡ nano-vllm

High-Throughput Paged KV-Cache LLM Inference Engine & Memory Management Runtime

🧠 Paged Memory Allocation: Adapts OS virtual memory paging to GPU VRAM, eliminating internal & external fragmentation.
⚡ Copy-On-Write (CoW) Prefix Sharing: Shares immutable system prompt blocks across sessions; drops TTFT to near-zero.
🔄 Iteration-Level Continuous Batching: Retires completed sequences dynamically on every token step, maximizing GPU compute utilization.
🛡️ Fault-Tolerant Preemption: Gracefully evicts cold prefixes via LRU and pauses requests under 100% saturation without CUDA OOM.
📊 Systems Observability Matrix: Real-time 2D physical VRAM block visualizer & per-request latency diagnostics HUD.

[View Repository] • [Architecture Specification]

🎵 Crimson Orbit

Low-Latency Bare-Metal 8086 Audio Synthesis & Acoustic Resynthesis Platform

⚡ 11.8 ms end-to-end audio latency (6.3× faster than monolithic emulators).
⏱️ 0.889 µs targeted I/O bus-cycle interceptor (PIT 8253 / PPI 61h).
💾 Custom 512-byte MBR bootloader running autonomous real-mode x86 kernel.
🎹 Multi-timbral acoustic resynthesis engine (Steinway Piano, Martin Guitar, Ludwig Drums).
📄 Accompanied by camera-ready 6-page IEEE conference paper & Turnitin verification.

[Live Web Studio] • [Download v1.0.0 Bootable FLP]

👁️ Argus-ML

Production Machine Learning Observability & Statistical Drift Detection Engine

📊 Real-time covariate and concept drift detection on streaming datasets.
📈 Kolmogorov-Smirnov (KS) & Population Stability Index (PSI) testing pipelines.
📉 Automated model performance degradation alerts and telemetry dash.
🛡️ Zero-trust statistical guardrails for mission-critical inference pipelines.

[View Repository]

⚡ Logic_verse

Interactive Discrete Logic & Digital Circuit Simulation System

🔌 Gate-level dynamic propagation delays and clock phase generation.
📐 Modular schematic builder with interactive truth-table verification.

[View Repository]

🛠️ Technical Arsenal & Competencies

Domain	Technologies & Frameworks
AI Systems & Inference Infrastructure
Low-Level & Computer Architecture
Machine Learning & Observability
Web & Systems Visualization
Tooling & Environments

📊 GitHub Activity & Telemetry

📜 Publications & Research Manuscripts

@inproceedings{crimsonorbit2026,
  author    = {Aher, Krishna and Bhargude, Sanskar and Agaldare, Ghansham and Birare, Hari and Kumar, Akash},
  title     = {Targeted Bus-Cycle Interception: A Low-Latency WebAssembly Bridge for 16-Bit Bare-Metal Audio Synthesis and Multi-Timbral Acoustic Resynthesis},
  booktitle = {Proceedings of the IEEE Conference on Computer Systems and Multidisciplinary Engineering},
  year      = {2026},
  pages     = {1--6},
  publisher = {IEEE}
}

_{Designed with precision by Akash Kumar • AI Systems & GPU Infrastructure}

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