Skip to content

arch/arm/gd32f4: fix missing CTL selector bits in up_disableusartint.#19112

Open
lccosy wants to merge 2 commits into
apache:masterfrom
lccosy:master
Open

arch/arm/gd32f4: fix missing CTL selector bits in up_disableusartint.#19112
lccosy wants to merge 2 commits into
apache:masterfrom
lccosy:master

Conversation

@lccosy

@lccosy lccosy commented Jun 10, 2026

Copy link
Copy Markdown
Contributor

Summary

Fix a bug in up_disableusartint() where USART interrupt state is saved without CTL selector bits (bits 24-27), causing up_restoreusartint() to never restore interrupt enables.

Problem

up_disableusartint() saves interrupt state from hardware CTL0-CTL3 registers into an encoded ie value, but omits the CTL selector bits. When up_restoreusartint() later restores interrupts using ie >> 24 to determine which CTL register to write, this evaluates to 0, so no CTL register is updated and all interrupt enables (including RBNEIE) are permanently lost.

This causes RX interrupts to never fire after any call to up_putc() (e.g. via syslog), making the serial console unable to receive input on GD32F4 platforms.

Impact

  • Serial console TX works normally (output is visible)
  • Serial console RX is completely broken (no input accepted, no NSH prompt)
  • Affects all GD32F4 USART ports when syslog or up_putc() is used

Fix

Add the corresponding CTL selector bit ( USART_CFG_CTLx_INT << USART_CFG_SHIFT ) whenever a CTL register has active interrupt bits, so that up_restoreusartint() can correctly identify and restore the interrupt state.

Testing

Tested on mplant-gd32f450 custom board (GD32F450ZGT6) with USART5 as serial console:

  • Before fix: NSH can output debug prints but cannot accept input, no
    sh>\ prompt , like this
ASERIAL: up_setup done base=0x40011400 CTL0=0x0000200c BAUD=0x00000364
BD
SERIAL: up_attach base=0x40011400 irq=87
SERIAL: up_attach IRQ87 enabled OK
SERIAL: up_rxint enable=1 base=0x40011400 ie=0x00000000
SERIAL: up_rxint done ie=0x01000002
bringup: USART5@0x40011400
  STAT0=0x00000000
  • After fix: NSH works correctly with both input and output,
    sh>\ prompt appears, like this
Nuttheartbeat: led task running
Shell (NSH)
Board: mplant-gd32f450 (GD32F450IK)
MCU:  GD32F450 200MHz, 112 KB SRAM

nsh> 

lccosy added 2 commits June 4, 2026 23:01
Add NULL check for g_uart_devs[i] before accessing ->priv in
arm_earlyserialinit() loop. When a USART is not enabled in defconfig,
g_uart_devs[i] is NULL, causing a HardFault crash during early boot.

The bug occurs because the original code only checked g_uart_devs[i]->priv
without first verifying g_uart_devs[i] is not NULL. On Cortex-M4, NULL
pointer dereference reads from Flash vector table (0x00000000 maps to
0x08000000), returning a function pointer that causes BusFault when
written to.

This fix matches the existing NULL check pattern used in arm_serialinit()
at line 2835 of the same file.

Tested on mplant-gd32f450 board with only USART5 enabled in defconfig.
Before fix: HardFault at boot (IPSR=3, PC=0x080003e0)
After fix: System boots normally to NSH Shell

Signed-off-by: lccosy <1191294205@qq.com>
up_disableusartint() saves USART interrupt state from hardware CTL0-CTL3
registers but omits the CTL selector bits (bits 24-27) in the encoded
ie value. When up_restoreusartint() later restores interrupts, it uses
ie >> 24 to determine which CTL register to write. Without selector bits
this evaluates to 0, so no CTL register is updated and all interrupt
enables (including RBNEIE) are permanently lost.

This causes RX interrupts to never fire after any call to up_putc()
(e.g. via syslog), making the serial console unable to receive input.

Fix by adding the corresponding CTL selector bit (USART_CFG_CTLx_INT
<< USART_CFG_SHIFT) whenever a CTL register has active interrupt bits.

Signed-off-by: lccosy <1191294205@qq.com>
@lccosy lccosy requested a review from xiaoxiang781216 as a code owner June 10, 2026 16:09
@github-actions github-actions Bot added Arch: arm Issues related to ARM (32-bit) architecture Size: S The size of the change in this PR is small labels Jun 10, 2026
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Labels

Arch: arm Issues related to ARM (32-bit) architecture Size: S The size of the change in this PR is small

Projects

None yet

Development

Successfully merging this pull request may close these issues.

2 participants