Bring support for wasm and mac#17
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Add FormatProfile {Core, Tier2, Native} with from_device detection and an
override on FsrContextInfo. Expose FsrFormats via FsrContext::formats(); validate
caller-provided textures against the active profile. Only Native is wired up;
Core/Tier2 assert pending their shader variants.
Seven storage images are only ever imageStore'd; declare them writeonly in GLSL and bind them WriteOnly. Required for the widened core-profile formats (which only validate as write-only) and a correctness improvement on native. Regenerated SPIR-V and shader table.
Frame info is a single read-modify-write vec4 of per-frame metadata. Storing it in a 1x1 Rgba32Float texture needs read-write storage-texture access, which is heavily restricted in baseline WebGPU. Back it with a storage buffer instead — unrestricted read-write at every format profile, and simpler. Profile-independent.
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Add the FFX_WGPU_FORMAT_PROFILE shader permutation and FSR3_FMT_* macros that remap storage-image formats per profile: on Core, single-channel sampled textures widen to RGBA and point-sampled/read-write ones pack into 32-bit formats. Thread FormatProfile through choose_shaders, resource format selection, texture creation, and bind-group layouts (unfilterable sample types for the packed core formats). The xtask names the profile enum Core/Tier2/Native. SPD mips still use the native format; Core/Tier2 remain asserted-off until the SPD restructure lands. Native is unchanged.
Pull the passthrough-vs-SpirV shader-module creation out of FsrPass::new into a shared create_shader_module, so the upcoming Core SPD pyramid passes can reuse it. No behavior change.
…eader Move the per-pixel shading-change difference metric (the sample sets, sorting network, ComputeDiff, and SpdLoadSourceImage) out of ffx_fsr3upscaler_shading_change_pyramid.h into a new ffx_fsr3upscaler_shading_change_diff.h, included by the pyramid header. This lets the upcoming Core write-only mip0 pass share the exact same metric. Preprocessed output is unchanged, so the compiled SPIR-V is identical.
Tier2 keeps FFX's single-pass SPD but widens the mips to rgba16float. Core has no multi-channel read-write storage, so the luma and shading-change pyramids become a chain of write-only single-level dispatches (mip0 reduction, downsample chain, auto-exposure), behind an SpdPyramid wrapper that keeps the dispatch call sites profile-agnostic. Lifts the Native-only assert and adds Core/Tier2 smoke tests plus a Core-vs-Native scene-average comparison. The packed 32-bit Core formats (R32Float / Rg32Float) are not filterable on a baseline device without float32-filterable, so the exposure, dilated depth, dilated motion-vector, and new-locks SRVs are bound unfilterable on Core, and the debug view point-loads the dilated depth and motion vectors instead of linearly sampling them. They are only ever point-loaded in production passes.
Verify wgpu-ffx builds for wasm32-unknown-unknown with the WebGPU backend (clippy + doc), so the WebGPU-compatible Core profile keeps compiling for the web even though we do not run it there.
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cargo clippyreports no issuescargo docreports no issuescargo denyissues have been fixed or added todeny.tomlAdded new functionality. @githubnameDescription
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