feat(native): add support for win arm64 unwind codes by klochek · Pull Request #978 · getsentry/symbolic

klochek · 2026-05-14T20:48:45Z

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github-actions · 2026-05-14T20:49:10Z

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📖	Do not forget to update Sentry-docs with your feature once the pull request gets approved.

Generated by 🚫 dangerJS against d002319

loewenheim

Very impressive! I basically only have some stylistic nits.

loewenheim · 2026-05-18T07:32:17Z

+            writer: &'a mut dyn Write,
+        }
+
+        // The kinds of registers the can be saved for unwinding.


Suggested change

// The kinds of registers the can be saved for unwinding.

// The kinds of registers that can be saved for unwinding.

loewenheim · 2026-05-18T07:33:27Z

+                }
+            }
+
+            // Computes the memory location relative to CFI, offset above SP


These could all be doc comments.

Suggested change

// Computes the memory location relative to CFI, offset above SP

/// Computes the memory location relative to CFI, offset above SP

loewenheim · 2026-05-18T07:36:55Z

+                    " .{typ}{first_reg}: .cfa {} + ^ .{typ}{second_reg}: .cfa {} + ^",
+                    o1, o2


Suggested change

" .{typ}{first_reg}: .cfa {} + ^ .{typ}{second_reg}: .cfa {} + ^",

o1, o2

" .{typ}{first_reg}: .cfa {o1} + ^ .{typ}{second_reg}: .cfa {o2} + ^"

loewenheim · 2026-05-18T07:38:12Z

+                    " .x{reg}: .cfa {} + ^ .lr: .cfa {} + ^",
+                    o1, o2


Suggested change

" .x{reg}: .cfa {} + ^ .lr: .cfa {} + ^",

o1, o2

" .x{reg}: .cfa {o1} + ^ .lr: .cfa {o2} + ^"

loewenheim · 2026-05-18T07:38:48Z

+                let second_reg = first_reg + 1;
+
+                self.last_reg_kind = typ;
+                self.last_reg_num = first_reg + 1;


Suggested change

self.last_reg_num = first_reg + 1;

self.last_reg_num = second_reg;

loewenheim · 2026-05-18T07:44:19Z

+                    if matches!(code.code, Arm64UnwindCode::End)
+                        || matches!(code.code, Arm64UnwindCode::EndC)


Suggested change

if matches!(code.code, Arm64UnwindCode::End)

|| matches!(code.code, Arm64UnwindCode::EndC)

if matches!(code.code, Arm64UnwindCode::End | Arm64UnwindCode::EndC)

I did not know this form! So much nicer :)

loewenheim · 2026-05-18T07:45:29Z

+                    function.function_length(),
+                );
+
+                for (instruction_num, code) in unwind_codes.iter().rev().enumerate() {


What is the reason for the rev? Are codes just generally returned in reverse order?

They're actually stored in reverse order; I think the idea is that, because codes are in 1:1 with the instruction prolog instructions, if you crash in the prolog, a native stalk-unwinder could jump to the correct unwind code based on the crashed PC, and then just walk forward, executing unwind codes, undoing all the work the prolog did, until it encounters the "end" code.

loewenheim · 2026-05-18T07:57:59Z

+                        Arm64UnwindCode::AllocSmall { size_bytes } => {
+                            enc.alloc_stack(size_bytes)?;
+                        }
+
+                        Arm64UnwindCode::AllocMedium { size_bytes } => {
+                            enc.alloc_stack(size_bytes)?;
+                        }
+
+                        Arm64UnwindCode::AllocLarge { size_bytes } => {
+                            enc.alloc_stack(size_bytes)?;
+                        }


Could unify these arms:

Suggested change

Arm64UnwindCode::AllocSmall { size_bytes } => {

enc.alloc_stack(size_bytes)?;

}

Arm64UnwindCode::AllocMedium { size_bytes } => {

enc.alloc_stack(size_bytes)?;

}

Arm64UnwindCode::AllocLarge { size_bytes } => {

enc.alloc_stack(size_bytes)?;

}

Arm64UnwindCode::AllocSmall { size_bytes } | Arm64UnwindCode::AllocMedium { size_bytes } | Arm64UnwindCode::AllocLarge { size_bytes } => {

enc.alloc_stack(size_bytes)?;

}

loewenheim · 2026-05-18T08:02:29Z

+                            first_reg,
+                            offset_bytes,
+                        } => {
+                            // save pair <x(19+2*#X),lr> at [sp+#Z*8], offset <= 504


Just to make sure (this applies to some of the other branches too): first_reg is already the number 19 + 2 *#X?

Yeah, goblins did the work for us :)

loewenheim · 2026-05-18T08:04:13Z

+                            if pair {
+                                if preindexed {
+                                    enc.save_pre_indexed_pair(typ, reg, offset_bytes)?;
+                                } else {
+                                    enc.save_indexed_pair(typ, reg, offset_bytes)?;
+                                }
+                            } else {
+                                if preindexed {
+                                    enc.save_pre_indexed(typ, reg, offset_bytes)?;
+                                } else {
+                                    enc.save_indexed(typ, reg, offset_bytes)?;
+                                }
+                            }


Could match on (pair, preindexed) here instead.

loewenheim · 2026-05-20T08:53:57Z

                    self.writer,
-                    " .{typ}{first_reg}: .cfa {} + ^ .{typ}{second_reg}: .cfa {} + ^",
-                    o1, o2
+                    " .{typ}{first_reg}: .cfa {o1} + ^ .{typ}{second_reg}: .cfa {o1} + ^"


There is a typo here which causes tests to fail:

Suggested change

" .{typ}{first_reg}: .cfa {o1} + ^ .{typ}{second_reg}: .cfa {o1} + ^"

" .{typ}{first_reg}: .cfa {o1} + ^ .{typ}{second_reg}: .cfa {o2} + ^"

cursor

Cursor Bugbot has reviewed your changes and found 1 potential issue.

There are 3 total unresolved issues (including 2 from previous reviews).

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^{Reviewed by Cursor Bugbot for commit a6c067b. Configure here.}

klochek force-pushed the christopherklochek/win_arm64_unwind branch 2 times, most recently from 08f62b8 to 614ab8b Compare May 15, 2026 13:58

loewenheim reviewed May 18, 2026

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loewenheim requested changes May 20, 2026

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klochek added 4 commits May 26, 2026 11:00

feat(native): add support for win arm64 unwind codes

a2ff3cf

feedback

752b91d

fix typo

25f0e3d

update changelong

322dbaf

klochek force-pushed the christopherklochek/win_arm64_unwind branch from 49c6031 to 322dbaf Compare May 26, 2026 15:03

klochek marked this pull request as ready for review May 26, 2026 15:03

klochek requested a review from a team as a code owner May 26, 2026 15:03

cursor Bot reviewed May 26, 2026

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Comment thread symbolic-cfi/src/lib.rs

Comment thread symbolic-cfi/src/lib.rs

Comment thread symbolic-cfi/src/lib.rs

sentry Bot reviewed May 26, 2026

View reviewed changes

Comment thread symbolic-cfi/src/lib.rs

Add explicit .ra entry when x30/lr is spilled

adfd94d

sentry Bot reviewed May 26, 2026

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Comment thread symbolic-cfi/src/lib.rs

fix missing register state

a6c067b

cursor Bot reviewed May 26, 2026

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Comment thread symbolic-cfi/src/lib.rs Outdated

it was right the first time

d002319

klochek requested a review from loewenheim May 26, 2026 16:47

sentry Bot reviewed May 26, 2026

View reviewed changes

Comment thread symbolic-cfi/src/lib.rs

	// The kinds of registers the can be saved for unwinding.
	// The kinds of registers that can be saved for unwinding.

	// Computes the memory location relative to CFI, offset above SP
	/// Computes the memory location relative to CFI, offset above SP

		" .{typ}{first_reg}: .cfa {} + ^ .{typ}{second_reg}: .cfa {} + ^",
		o1, o2

	" .{typ}{first_reg}: .cfa {} + ^ .{typ}{second_reg}: .cfa {} + ^",
	o1, o2
	" .{typ}{first_reg}: .cfa {o1} + ^ .{typ}{second_reg}: .cfa {o2} + ^"

	" .x{reg}: .cfa {} + ^ .lr: .cfa {} + ^",
	o1, o2
	" .x{reg}: .cfa {o1} + ^ .lr: .cfa {o2} + ^"

	self.last_reg_num = first_reg + 1;
	self.last_reg_num = second_reg;

		if matches!(code.code, Arm64UnwindCode::End)
		\|\| matches!(code.code, Arm64UnwindCode::EndC)

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klochek commented May 14, 2026 •

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github-actions Bot commented May 14, 2026 •

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