Add PCLMULQDQ-accelerated CRC32C path with large block folding

[pkdog]

Summary

• Adds a new SSE4.2 + PCLMULQDQ accelerated CRC32C implementation (ExtendSse42Clmul) that uses PCLMULQDQ carry-less multiplication for stripe folding, replacing the skip-table approach
• Adds larger block sizes (16128B / 4032B) beyond the AWS checksums baseline (3072B) to reduce folding frequency by 5.3x, matching SSE4.2 skip-table block hierarchy
• Improves prefetch horizon from 128B to 256B

Performance (Intel Xeon E5-2678 v3, Release build)

Buffer	PCLMUL (this PR)	SSE4.2 skip-table (existing)
256B	16.0 ns (14.9 GiB/s)	32.1 ns (7.4 GiB/s)
64KiB	2672 ns (22.8 GiB/s)	2691 ns (22.7 GiB/s)
16MiB	715785 ns (21.8 GiB/s)	724845 ns (21.6 GiB/s)

PCLMUL path is now equal to or faster than SSE4.2 skip-table at all buffer sizes.

Files changed

• New: src/crc32c_sse42_clmul.{cc,h} — PCLMUL-accelerated implementation
• Modified: src/crc32c.cc — dispatch logic (PCLMUL > SSE4.2 > ARM64 > portable)
• Modified: src/crc32c_sse42_check.h — added CanUseClmul() CPUID detection
• Modified: CMakeLists.txt — PCLMUL compile detection and OBJECT library
• Modified: src/crc32c_config.h.in — added HAVE_PCLMUL define
• Modified: plans/x86-pclmul-optimization.md — updated optimization plan

Test plan

• ctest — all 2 test suites pass
• crc32c_bench — all benchmarks pass, PCLMUL ≥ SSE4.2 at all sizes
• Algorithm verified against awslabs/aws-checksums reference
• Folding constants verified by GF(2) linear algebra tool

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Draft PR — pending final review.

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