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Implement MSHV aarch64 backend - #1626

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cshung:cshung/mshv-aarch64
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Implement MSHV aarch64 backend#1626
cshung wants to merge 2 commits into
hyperlight-dev:mainfrom
cshung:cshung/mshv-aarch64

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@cshung

@cshung cshung commented Jul 6, 2026

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Summary

Implements the VirtualMachine trait for MSHV on aarch64, replacing the previous stub.

Changes

  • mshv/aarch64.rs: Full implementation — VM creation, memory mapping, vcpu run loop with MMIO-based I/O dispatch, register access (general/FPU/special via hv_register_assoc), vcpu reset
  • hyperlight_vm/aarch64.rs: Wire up MshvVm::new() when MSHV is detected
  • memory_region.rs: Implement TryFrom<hv_arm64_memory_intercept_message> for MemoryRegionFlags

Design

  • Follows KVM aarch64 I/O page pattern (MMIO writes to I/O page GPA → port I/O)
  • Follows MSHV x86_64 patterns for partition creation and register access
  • Uses low-level get_reg/set_reg for system regs (get_sregs/set_sregs not available on aarch64 in mshv-ioctls)

Testing

  • Cross-compiled and checked for aarch64-unknown-linux-gnu locally ✅
  • No MSHV aarch64 runtime environment available yet for integration testing

@cshung cshung added the kind/enhancement For PRs adding features, improving functionality, docs, tests, etc. label Jul 7, 2026
cshung and others added 2 commits July 31, 2026 14:38
Add a full VirtualMachine trait implementation for MSHV on aarch64,
replacing the previous stub that returned false/unimplemented.

Key changes:
- mshv/aarch64.rs: Complete implementation including VM creation,
  memory mapping, vcpu run loop with MMIO-based I/O dispatch,
  general/FPU/special register access via hv_register_assoc, and
  vcpu reset support.
- hyperlight_vm/aarch64.rs: Wire up MshvVm::new() so MSHV is used
  when detected (previously returned NoHypervisorFound).
- memory_region.rs: Implement TryFrom<hv_arm64_memory_intercept_message>
  for MemoryRegionFlags using intercept_access_type field.

The implementation mirrors the KVM aarch64 backend's I/O page pattern
(MMIO writes to the I/O page GPA are interpreted as port I/O) and
follows MSHV x86_64 patterns for partition creation and register access.

Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
Signed-off-by: cshung <3410332+cshung@users.noreply.github.com>
Configure the GIC, decode MMIO writes, preserve register state, and rebuild the partition during restore.

Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
Signed-off-by: cshung <3410332+cshung@users.noreply.github.com>
@cshung
cshung force-pushed the cshung/mshv-aarch64 branch from b34cc5d to fb92ede Compare July 31, 2026 16:13
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