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feat(M4-P0E3A): three independent MU CFG transactions with ACK+readback - #347
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…MMIT/readback Prevalidate/freeze all three typed 4I4V scenario drafts and canonical per-MU hashes before touching UART. Apply fixed 12-command per-slot SVSTREAM CFG batches via the sole DeviceIoWorker, with mandatory firmware token/hash/generation COMMIT+READBACK before moving to next MU. Enforce 7s stage/60s total bounds, STOP/boot/session cancellation and explicit partial-commit diagnostics. Integrate Apply 3 MU in single Studio GUI, keep global START gated. Extend existing M4 and S8 harnesses; no new CI jobs, no MCU realtime-path change.
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Qt's slots macro collides with an internal DSP slots identifier when live_signal_state.hpp is included after Qt in DeviceController.hpp. Keep the M4 scenario public header transport-only, and load live_signal_transaction.hpp first in its .cpp. Addresses exact compiler log; no ABI or runtime change.
…thority Serial worker now drops all unsent exclusive MU CFG commands on failed/timeout transaction, but does not synthesize SV/PTP STOP. Its retirement ACK is held until an active write drains; DeviceController maintains the command reservation meanwhile and never infers firmware bank rollback. Add S8 queue retirement and in-flight regression. Addresses Codex P2 safety review; no CI configuration or firmware changes.
…ment fixture The seedVerified helper models semantic board identity before the asynchronous DeviceIoWorker ready signal. Explicitly mark the existing worker ready in the M4 STOP/retirement regression so the test exercises queued exclusive retirement, rather than failing its admission check.
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P0E3A meaningful product milestone
M4ThreeMuScenarioApplyencodes three independent fixed-capacitySVSTREAM 1/2/3 CFG BEGIN/FREQ/8 SET/SHAPE/COMMITbatches, computes each canonicalsv_scenario_hash, and requires exact firmware COMMITTED token/hash/generation followed by firmware READBACK token/hash/generation before advancing to the next slot.arstack_m4_upload_harness(MU3 preflight failure; correct all three commits/readbacks; wrong hash; boot epoch fault), plus the existing S8 deterministic harness for STOP and V1 isolation. No extra workflows, runners, or matrix entries. Engineer guide.Tracks M4 P0: Three simultaneous SCL-configured 4I4V SV streams with shared PTP grid and per-stream Studio pages #333. Next P0E3B: complete firmware SHOW CT readback/reconnect adoption; then group START gate and P0F physical capture.