Skip to content

Repository files navigation

PCIe to OpenCAPI-Compatible SlimSAS 8x

The Open Coherant Accelerator Processor Interface (OpenCAPI) was a standard that had FPGA-based Advanced Accelerated Cable (AAC) Add-In cards such as ADM-PCIE-9H3, ADM-PCIE-9H7, ADM-PCIE-9V3, ADM-PCIE-9V5, BittWare XUP-VV4, BittWare XUP-VVH, and Nvidia Innova-2 Flex.

The OpenCAPI SlimSAS interface is based on PCI-Express. This project is an adapter capable of connecting such FPGA boards to host systmes with PCIe.

OpenCAPI-to-PCIe Adapter

This design uses the OpenCAPI pinout from the ADM-PCIE-9V5 User Manual (Pg15-19of38):

OpenCAPI Pinout from

The only OpenCAPI board I have to test against is the Innova-2 MNV303212A-ADLT Rev:A2 and I designed the OpenCAPI-to-PCIe_for_MNV303212A_RevA2 project as an optimized variant of this design for that board.

Issues when used with the Innova-2 MNV303212A RevA2

The current v0.2 release of this project worked with the First Release of the innova2_xdma_opencapi project:

git clone --revision=348716249bafc39514cb1a422a8e2fb5f301f859 https://github.com/mwrnd/innova2_xdma_opencapi.git
wget https://github.com/mwrnd/innova2_xdma_opencapi/releases/download/v0.1/innova2_xdma_opencapi_bitstream.zip

But, it required a non-standard GTY Channel to PCIe Lane mapping that Vivado complains about:

Vivado Critical Warning about Lane Ordering

The OpenCAPI-to-PCIe_for_MNV303212A_RevA2 project is a version of this adapter optimized for the Innova-2 MNV303212A Rev:A2.

PCB Layout

4-Layer PCB. Inner 2 layers are GND planes. Differential pairs are matched to a length of 65mm +/- 1mm both inter-pair and intra-pair (N-to-P).

OpenCAPI to PCIe x8 PCB Layout

Schematic

OpenCAPI to PCIe x8 Schematic

Design Notes

Refer to the ADM-PCIE-9V5 User Manual (Pg15-19of38). Useful High Speed Design presentation.

Only a single component is needed for the adapter, a U10A474200T/U10A474240T SlimSAS 8x Right-Angle SMD Connector.

A SlimSAS 8x Cable such as the 3M 8ES8-1DF21(Datasheet) is required to use the adapter with an OpenCAPI FPGA Board.

Resistor R1 is shorted to connect nPRSNT1 to nPRSNT2_x8. The trace can be scratched off and nPRSNT1 can be connected to nPRSNT2_x1 or nPRSNT2_x4 to limit the PCIe lane width.

Additional useful signals from the OpenCAPI connector are routed to a 6x1 0.1" Header (DigiKey). The pinout matches a TC74 I2C Temperature Sensor (DigiKey) for testing I2C. I2C pull-ups are on the AAC Add-in card. Note 3.3V is from the PCIe connector. PRE is a Presence Detect pin which is connected to GND via a 50-Ohm resistor on the OpenCAPI AAC Add-In card. RST is connected to PCIe/OpenCAPI RESET.

PCB Stackup

I am using values from JLCPCB.

4-Layer Stackup

Trace Impedance Control

OpenCAPI uses 85ohm impedance cables. I played with the values until I got the loosest differential pair coupling that is manufacturable with larger tolerances.

85ohm Differential Impedance in DigiKey Calculator

About

OpenCAPI-Compatible SlimSAS 8x to PCIe Endpoint Adapter

Topics

Resources

Stars

1 star

Watchers

0 watching

Forks

Releases

Contributors