Regs: Single-source the compute_op encoding in SystemRDL - #176
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Declare the compute op encoding as an RDL enum (encode= on compute_cfg.compute_op) instead of listing the values in the field desc. The encoding becomes machine- readable: peakrdl raw-header emits it into the C header (COMPUTE_OP__MXQUANT ...) and the SV addrmap pkg (compute_op_e), so SW integrators derive the op codes from the reg contract instead of hand-mirroring idma_pkg::compute_op_e. The regblock hwif is unchanged (compute_op.value stays logic [3:0]).
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The compute op encoding now has one source: the compute_op encode enum in idma_reg.rdl. util/gen_compute_svh.py renders it into target/rtl/include/idma/compute.svh (member descs become comments, enum width from the field width), which idma_pkg.sv includes in place of the hand-written enum. Generated alongside tracer.svh and checked in on deploy branches.
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The compute op encoding now has exactly one source: the
compute_opencode enum inidma_reg.rdl(member descs carry the byte-ratio documentation).Everything else derives from it:
idma_pkg::compute_op_e—util/gen_compute_svh.pyrenders the enum intotarget/rtl/include/idma/compute.svh(width taken from the 4-bit field, descs become member comments), whichidma_pkg.svincludes in place of the hand-written enum. Generated alongsidetracer.svh, checked in on deploy branches.peakrdl raw-headeremitsCOMPUTE_OP__MXQUANT... into the C header andcompute_op_einto the SV addrmap pkg, so integrators derive the op codes instead of hand-mirroring them.The regblock hwif is unchanged (
compute_op.valuestayslogic [3:0]). Validated on the regenerated RTL:tb_idma_reg_frontendpasses in all three configs,tb_idma_mxquantALL PASS at every DataWidth. Follow-up to #170.