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6583589
audio: tflm: add keyword detection logging, host notification, and HD…
lrgirdwo Jul 22, 2026
411ed5e
audio: tflm: fix tensor byte sizing for micro speech int8 input
lrgirdwo Jul 22, 2026
3776df6
audio: tflm: integrate keyword detection with KPB for WoV trigger
lrgirdwo Jul 22, 2026
a6c639c
tools: topology2: update WoV pipeline graph with dual-path KPB routing
lrgirdwo Jul 22, 2026
df47967
docs: tensorflow: add comprehensive README for TFLM WoV architecture …
lrgirdwo Jul 22, 2026
930de94
ptl: app: enable KPB, TFLM, MFCC, Gain, Volume components and update …
lrgirdwo Jul 23, 2026
ea7449b
ptl: rimage: include KPB, TFLM, Volume and MFCC in base firmware mani…
lrgirdwo Jul 23, 2026
cf89a85
tools: topology2: update KPB IPC4 UUID and HDA TFLM 16kHz WoV topology
lrgirdwo Jul 23, 2026
e54cb5c
scripts: llext: support relocatable link bypass
lrgirdwo Jun 16, 2026
4470b81
library_manager: llext: implement page-level VMA allocator for reloca…
lrgirdwo Jun 16, 2026
22f090e
config: llext: enable SLID-based symbol linking for relocatable modules
lrgirdwo Jun 16, 2026
af4908e
config: intel_adsp: enable TFLM module and C++ dependencies for ace15…
lrgirdwo Jul 24, 2026
09a2cd3
audio: tensorflow: support Zephyr SDK GCC toolchain for LLEXT build
lrgirdwo Jul 24, 2026
3a7ce9f
topology2: add IPC4 ABI manifest and SoundWire TFLM topology configur…
lrgirdwo Jul 24, 2026
c21e37a
zephyr: Expand Virtual Heap to 4MB and Kernel Heap Pool to 32KB
lrgirdwo Aug 1, 2026
c6170c0
audio: tflm: Add KPB trigger notifications and stream shutdown event …
lrgirdwo Aug 1, 2026
331179b
topology: Add TFLM KPB topology targets and multi-pipeline output routes
lrgirdwo Aug 1, 2026
27e1681
audio: tflm: Update README.md with pipeline architecture, input abstr…
lrgirdwo Aug 1, 2026
cc4735d
config: cavs2.5: enable TFLM WoV statically and size DP/heap for it
lrgirdwo Aug 6, 2026
1960328
audio: tensorflow: build TFLM statically for HiFi3 targets (GCC/Zephy…
lrgirdwo Aug 6, 2026
0345ab4
topology2: tflm: attach real MFCC config blob and add HDA Mic host-co…
lrgirdwo Aug 6, 2026
d24291c
audio: tflm: strip MFCC header and requantize real mel features per-hop
lrgirdwo Aug 6, 2026
917e66f
audio: tflm: update README with current architecture, build and train…
lrgirdwo Aug 6, 2026
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7 changes: 6 additions & 1 deletion app/boards/intel_adsp_ace15_mtpm.conf
Original file line number Diff line number Diff line change
Expand Up @@ -17,6 +17,11 @@ CONFIG_FORMAT_CONVERT_HIFI3=n
CONFIG_SAMPLE_KEYPHRASE=y
CONFIG_COMP_PHASE_VOCODER=y
CONFIG_COMP_STFT_PROCESS=y
CONFIG_SOF_STAGING=y
CONFIG_CPP=y
CONFIG_STD_CPP17=y
CONFIG_COMP_TENSORFLOW=m
CONFIG_STACK_SIZE_EDF=32768

# SOF / audio modules / mocks
# This mock is part of official sof-bin releases because the CI that
Expand Down Expand Up @@ -52,7 +57,7 @@ CONFIG_SOF_LOG_LEVEL_INF=y
CONFIG_DEBUG_COREDUMP=y
CONFIG_DEBUG_COREDUMP_BACKEND_INTEL_ADSP_MEM_WINDOW=y
CONFIG_DEBUG_COREDUMP_MEMORY_DUMP_MIN=y
CONFIG_HEAP_MEM_POOL_SIZE=8192
CONFIG_HEAP_MEM_POOL_SIZE=32768
CONFIG_LLEXT=y
CONFIG_LLEXT_STORAGE_WRITABLE=y
CONFIG_LLEXT_EXPERIMENTAL=y
Expand Down
8 changes: 7 additions & 1 deletion app/boards/intel_adsp_ace30_ptl.conf
Original file line number Diff line number Diff line change
Expand Up @@ -15,6 +15,12 @@ CONFIG_FORMAT_CONVERT_HIFI3=n
CONFIG_COMP_GOOGLE_RTC_AUDIO_PROCESSING=m
CONFIG_GOOGLE_RTC_AUDIO_PROCESSING_MOCK=y
CONFIG_COMP_STFT_PROCESS=y
CONFIG_SOF_STAGING=y
CONFIG_COMP_KPB=y
CONFIG_COMP_TENSORFLOW=y
CONFIG_COMP_MFCC=y
CONFIG_COMP_VOLUME=y
CONFIG_COMP_GAIN=y

# SOF / infrastructure
CONFIG_KCPS_DYNAMIC_CLOCK_CONTROL=n
Expand All @@ -29,7 +35,7 @@ CONFIG_COLD_STORE_EXECUTE_DRAM=y
CONFIG_INTEL_MODULES=y
CONFIG_LIBRARY_AUTH_SUPPORT=y
CONFIG_LIBRARY_MANAGER=y
CONFIG_LIBRARY_BASE_ADDRESS=0xa0688000
CONFIG_LIBRARY_BASE_ADDRESS=0xa0700000
CONFIG_LIBRARY_BUILD_LIB=y
CONFIG_LIBRARY_DEFAULT_MODULAR=y

Expand Down
10 changes: 9 additions & 1 deletion app/boards/intel_adsp_cavs25.conf
Original file line number Diff line number Diff line change
Expand Up @@ -12,6 +12,13 @@ CONFIG_COMP_MFCC=y
CONFIG_COMP_MULTIBAND_DRC=y
CONFIG_COMP_VOLUME_WINDOWS_FADE=y
CONFIG_FORMAT_CONVERT_HIFI3=n
CONFIG_SOF_STAGING=y
CONFIG_CPP=y
CONFIG_STD_CPP17=y
# cavs2.5 has no LLEXT/module-manager support (see CONFIG_LIBRARY_MANAGER=n
# below), so build tensorflow in statically rather than as an LLEXT module.
CONFIG_COMP_TENSORFLOW=y
CONFIG_STACK_SIZE_EDF=32768
CONFIG_PCM_CONVERTER_FORMAT_S16LE=y
CONFIG_PCM_CONVERTER_FORMAT_S24LE=y
CONFIG_PCM_CONVERTER_FORMAT_S32LE=y
Expand All @@ -33,7 +40,8 @@ CONFIG_SOF_LOG_LEVEL_INF=y
CONFIG_DEBUG_COREDUMP=y
CONFIG_DEBUG_COREDUMP_BACKEND_INTEL_ADSP_MEM_WINDOW=y
CONFIG_DEBUG_COREDUMP_MEMORY_DUMP_MIN=y
CONFIG_HEAP_MEM_POOL_SIZE=8192
CONFIG_HEAP_MEM_POOL_SIZE=32768
CONFIG_COMMON_LIBC_MALLOC_ARENA_SIZE=32768

# Zephyr / device drivers
CONFIG_DAI_INIT_PRIORITY=70
Expand Down
1 change: 1 addition & 0 deletions app/llext_relocatable.conf
Original file line number Diff line number Diff line change
@@ -1 +1,2 @@
CONFIG_LLEXT_TYPE_ELF_RELOCATABLE=y
CONFIG_LLEXT_EXPORT_BUILTINS_BY_SLID=y
63 changes: 53 additions & 10 deletions scripts/llext_link_helper.py
Original file line number Diff line number Diff line change
Expand Up @@ -77,6 +77,23 @@ def main():

command = [args.command]

# If the linker command is clang, extract --target= and --ld-path= from params
# and add them to the command (before the linker flags). Without --target,
# clang uses the host target (x86_64) when invoking the linker, which fails
# for cross-compiled (e.g. xtensa) object files.
clang_flags_to_hoist = []
remaining_params = []
for p_arg in args.params:
if p_arg.startswith('--target=') or p_arg.startswith('--ld-path='):
clang_flags_to_hoist.append(p_arg)
else:
remaining_params.append(p_arg)
if clang_flags_to_hoist:
command.extend(clang_flags_to_hoist)
args.params = remaining_params

is_relocatable = '-r' in args.params

executable = []
writable = []
readonly = []
Expand Down Expand Up @@ -111,7 +128,8 @@ def main():
text_found = True
text_addr = max_alignment(text_addr, 0x1000, s_alignment)
text_size = s_size
command.append(f'-Wl,-Ttext=0x{text_addr:x}')
if not is_relocatable:
command.append(f'-Wl,-Ttext=0x{text_addr:x}')
else:
executable.append(section)

Expand Down Expand Up @@ -164,7 +182,8 @@ def main():

dram_addr = align_up(dram_addr, s_alignment)

command.append(f'-Wl,--section-start={s_name}=0x{dram_addr:x}')
if not is_relocatable:
command.append(f'-Wl,--section-start={s_name}=0x{dram_addr:x}')

dram_addr += section.header['sh_size']

Expand All @@ -177,7 +196,8 @@ def main():

dram_addr = align_up(dram_addr, s_alignment)

command.append(f'-Wl,--section-start={s_name}=0x{dram_addr:x}')
if not is_relocatable:
command.append(f'-Wl,--section-start={s_name}=0x{dram_addr:x}')

dram_addr += section.header['sh_size']

Expand All @@ -189,7 +209,8 @@ def main():

start_addr = align_up(start_addr, s_alignment)

command.append(f'-Wl,--section-start={s_name}=0x{start_addr:x}')
if not is_relocatable:
command.append(f'-Wl,--section-start={s_name}=0x{start_addr:x}')

start_addr += section.header['sh_size']

Expand All @@ -201,12 +222,22 @@ def main():

start_addr = align_up(start_addr, s_alignment)

if s_name == '.data':
command.append(f'-Wl,-Tdata=0x{start_addr:x}')
else:
command.append(f'-Wl,--section-start={s_name}=0x{start_addr:x}')

start_addr += section.header['sh_size']
if not is_relocatable:
if s_name == '.data':
command.append(f'-Wl,-Tdata=0x{start_addr:x}')
else:
command.append(f'-Wl,--section-start={s_name}=0x{start_addr:x}')

Comment on lines +225 to +230
ld_script_path = pathlib.Path(args.file).parent / 'llext_merge.ld'
with open(ld_script_path, 'w') as f_ld:
f_ld.write('SECTIONS\n{\n'
' .text : { *(.text .text.* .stub .gnu.linkonce.t.*) }\n'
' .literal : { *(.literal .literal.*) }\n'
' .rodata : { *(.rodata .rodata.* .gnu.linkonce.r.*) }\n'
' .data : { *(.data .data.* .gnu.linkonce.d.*) }\n'
' .bss : { *(.bss .bss.* COMMON) }\n'
'}\n')
command.append(f'-Wl,-T,{ld_script_path}')

command.extend(['-o', f'{args.file}.tmp'])
command.extend(args.params)
Expand All @@ -215,6 +246,18 @@ def main():

copy_command = [args.copy]

copy_command.extend([
'--strip-debug',
'--remove-section=.comment',
'--remove-section=.llvm_addrsig',
'--remove-section=.eh_frame',
'--remove-section=.rela.eh_frame',
'--remove-section=.xt.prop',
'--remove-section=.rela.xt.prop',
'--remove-section=.xt.lit',
'--remove-section=.rela.xt.lit',
])

if first_dram_text:
copy_command.extend(['--set-section-alignment', f'{first_dram_text}=4096'])
if first_dram_rodata:
Expand Down
3 changes: 3 additions & 0 deletions scripts/llext_offset_calc.py
Original file line number Diff line number Diff line change
Expand Up @@ -47,6 +47,9 @@ def get_elf_size(elf_name):
if section.header['sh_addr'] + section.header['sh_size'] > end:
end = section.header['sh_addr'] + section.header['sh_size']

if start == 0xffffffff:
return 0

size = end - start

return size
Expand Down
10 changes: 10 additions & 0 deletions src/audio/mfcc/tune/setup_mfcc.m
Original file line number Diff line number Diff line change
Expand Up @@ -31,6 +31,16 @@ function setup_mfcc()
setup.tplg_fn = 'mel80_compress.conf';
export_mfcc_setup(gen_cfg, setup);

% Blob for 40-bin/20ms-hop mel spectrogram, matching TFLM micro_speech's
% front-end shape (TFLM_FEATURE_SIZE=40, TFLM_FEATURE_STRIDE_MS=20,
% TFLM_FEATURE_DURATION_MS=30) for interim wake-word sanity-checking.
setup = get_mel_spectrogram_config();
setup.frame_length = 30.0; % 480 samples at 16 kHz
setup.frame_shift = 20.0; % 320 samples at 16 kHz
setup.num_mel_bins = 40;
setup.tplg_fn = 'mel40.conf';
export_mfcc_setup(gen_cfg, setup);

% Blob for mel spectrogram with compress PCM output and DTX
setup = get_mel_spectrogram_config();
setup.compress_output = true;
Expand Down
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