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Allow vias through empty inner layers - #163

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ShiboSoftwareDev wants to merge 2 commits into
repro/pmp22650-missing-local-via-regionsfrom
fix/allow-vias-through-empty-inner-layers
Open

ShiboSoftwareDev wants to merge 2 commits into
repro/pmp22650-missing-local-via-regionsfrom
fix/allow-vias-through-empty-inner-layers

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@ShiboSoftwareDev

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Issue

RectDiff only merged overlapping outer-layer free regions when an inner copper pour existed. On PMP22650, valid empty inner-layer space near C241/R188 was therefore emitted as separate top and bottom regions, so the router could not place the local via used by the original board.

Fix

Allow outer-layer transit when every intermediate layer is clear. Ordinary inner-layer obstacles still block the merge, and the existing copper-plane checks remain.

The real-board snapshot from #162 now gains a local top-to-bottom region: the nearest transition moves from 5.607 mm to 0.962 mm from the original Altium via. The production PMP22650 pipeline completes with this topology fix alone.

Verification

  • 105 tests pass, 1 existing skip
  • build passes
  • formatting passes

@vercel

vercel Bot commented Oct 15, 2026 •

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Project Deployment Actions Updated
rectdiff Ready Ready Preview Oct 15, 2026 5:43pm UTC

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…-regions' into fix/allow-vias-through-empty-inner-layers

This branch was successfully deployed

1 active deployment
Preview — 4aad5c99 Deployed Oct 15, 2026 by vercel[bot]
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