[FEATURE] Limit the combined d/q voltage before PWM

[nikolasvoss]

dq voltage-vector limit

Vd and Vq are currently limited independently. This can request more total
voltage than the inverter can create. For example, with voltage_limit = 6V,
Vd = 6V and Vq = 6V need about 8.5V together.

This was partially discussed in #246.
With larger d- and q-axis voltage demands, phase-level clipping distorts the output voltage vector, which can reduce torque and degrade current control.

Basically, this is a standard dq voltage-vector limiter; see MathWorks’
DQ Limiter block.

Before setPhaseVoltage(), scale the final Vd and Vq together when needed:

float magnitude_sq = voltage.q * voltage.q + voltage.d * voltage.d;
float limit_sq = voltage_limit * voltage_limit;

if (magnitude_sq > limit_sq) {
  float scale = voltage_limit / sqrtf(magnitude_sq);
  voltage.q *= scale;
  voltage.d *= scale;
}