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design-rule-checking

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Placement and routing engine for digital ICs, written from scratch in Rust: ePlace global placement, Abacus legalization, CUGR-style global routing, TritonRoute-style detailed routing and a FlexGC-style design rule checker. Nine Nangate45 designs up to 1.24M cells placed and routed with zero violations, verified with OpenROAD's check_drc.

  • Updated Oct 27, 2026
  • Rust

Autonomous agentic system for chip physical verification. Turns a natural language design rule spec into an executable KLayout DRC script, runs it against a GDSII layout, and self-corrects violations with bounded, re-verified repair attempts. Built on open EDA tooling, no proprietary PDK required.

  • Updated Jul 24, 2026
  • Jupyter Notebook

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