Radar target generator (DRFM) on ZCU208 RFSoC: delay/Doppler/gain-controlled false echoes, live web GUI, verified against radar on SDR. Saab summer project 2026.
fpga radar vhdl xilinx sdr digital-signal-processing rfsoc range-doppler zcu208 drfm usrp-b210 target-generator
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Updated
Aug 8, 2026 - VHDL